CDCL1810 Datasheet, PDF (1/25 Pages) Texas Instruments – 1.8V, 10 Output, High-Performance Clock Distributor

CDCL1810
www.ti.com
SLLS781A – FEBRUARY 2007 – REVISED MARCH 2007
1.8V, 10 Output, High-Performance Clock Distributor
FEATURES
• Single 1.8V Supply
• High-Performance Clock Distributor with 10
Outputs
• Low Input-to-Output Additive Jitter:
As Low As 10fs RMS
• Output Group Phase Adjustment
• Low-Voltage Differential Signaling (LVDS)
Input, 100Ω Differential On-Chip Termination,
Up to 650MHz Frequency
• Differential Current Mode Logic (CML)
Outputs, 50Ω Single-Ended On-Chip
Termination, Up to 650MHz Frequency
• Two Groups of Five Outputs Each with
Independent Frequency Division Ratios
• Output Frequency Derived with Divide Ratios
of 1, 2, 4, 5, 8, 10, 16, 20, 32, 40, and 80
• Meets ANSI TIA/EIA-644-A-2001 LVDS
Standard Requirements
• Power Consumption: 410mW Typical
• Output Enable Control for Each Output
• SDA/SCL Device Management Interface
• 48-pin QFN (RGZ) Package
• Industrial Temperature Range: –40°C to +85°C
APPLICATIONS
• Clock Synthesis and Distribution for
High-Speed SERDES
• Synthesis and Distribution of SERDES
Reference Clocks for 1G/10G Ethernet,
1X/2X/4X/10X Fibre Channel, PCI Express,
Serial ATA, SONET, CPRI, OBSAI, etc.
• Up to 1-to-10 Clock Buffering and Fan-out
Differential
LVDS Input
Up to 650MHz
SDA/SCL
DIVIDER
DIVIDER
5 Differential
CML Outputs
Up to 650MHz
5 Differential
CML Outputs
Up to 650MHz
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated