CD74HC154 Datasheet, PDF (1/6 Pages) Texas Instruments – High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer

Data sheet acquired from Harris Semiconductor
SCHS152
September 1997
CD74HC154,
CD74HCT154
High Speed CMOS Logic
4-to-16 Line Decoder/Demultiplexer
[ /Title
(CD74
HC154
,
CD74
HCT15
4)
/Sub-
ject
(High
Speed
CMOS
Logic
4-to-16
Line
Decod
er/Dem
Features
Description
• Two Enable Inputs to Facilitate Demultiplexing and
Cascading Functions
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
The Harris CD74HC154 and CD74HCT154 are 4-to-16 line
decoders/demultiplexers with two enable inputs, E1 and E2.
A High on either enable input forces the output into the High
state. The demultiplexing function is performed by using the
four input lines, A0 to A3, to select the output lines Y0 to
Y15, and using one enable as the data input while holding
the other enable low.
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30%of V_CC at
V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
Ordering Information
PART NUMBER TEMP. RANGE (^oC) PACKAGE
PKG.
NO.
CD74HC154E
-55 to 125
24 Ld PDIP E24.6
CD74HCT154E
-55 to 125
24 Ld PDIP E24.6
CD74HC154EN
-55 to 125
24 Ld PDIP E24.3
CD74HC154EN
-55 to 125
24 Ld PDIP E24.3
CD74HC154M
-55 to 125
24 Ld SOIC M24.3
CD74HCT154M
-55 to 125
24 Ld SOIC M24.3
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer or d ie for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
Pinout
CD74HC154, CD74HCT154
(PDIP, SOIC)
TOP VIEW
Y0 1
Y1 2
Y2 3
Y3 4
Y4 5
Y5 6
Y6 7
Y7 8
Y8 9
Y9 10
Y10 11
GND 12
24 V_CC
23 A0
22 A1
21 A2
20 A3
19 E2
18 E1
17 Y15
16 Y14
15 Y13
14 Y12
13 Y11
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
1
File Number 1657.1