CD5474HC11 Datasheet, PDF (1/6 Pages) Texas Instruments – High Speed CMOS Logic Triple 3-Input AND Gate

Data sheet acquired from Harris Semiconductor
SCHS273A
August 1997 - Revised May 2000
CD54/74HC11,
CD54/74HCT11
High Speed CMOS Logic
Triple 3-Input AND Gate
[ /Title
(CD54
HCT11
,
CD74
HC11,
CD74
HCT11
)
/Sub-
ject
(High
Features
Description
• Buffered Inputs
•
Typical Propagation Delay:
C_L = 15pF, T_A = 25^oC
8ns
at
V_CC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
The ’HC11 and ’HCT11 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family.
Ordering Information
PART NUMBER
TEMP. RANGE
(^oC)
PACKAGE
CD54HC11F
-55 to 125
14 Ld CERDIP
CD54HC11F3A
-55 to 125
14 Ld CERDIP
CD74HC11E
-55 to 125
14 Ld PDIP
CD74HC11M
-55 to 125
14 Ld SOIC
CD54HCT11F
-55 to 125
14 Ld CERDIP
CD54HCT11F3A
-55 to 125
14 Ld CERDIP
CD74HCT11E
-55 to 125
14 Ld PDIP
CD74HCT11M
-55 to 125
14 Ld SOIC
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local TI sales office or cus-
tomer service for ordering information.
Pinout
CD54HC11, CD54HCT11
(CERDIP)
CD54HCT11, CD74HC11, CD74HCT11
(PDIP, SOIC)
TOP VIEW
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2000, Texas Instruments Incorporated
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