THC63LVD823 Datasheet, PDF (7/16 Pages) THine Electronics, Inc. – Single(135MHz)/Dual(170MHz) Link LVDS Transmitter for SXGA/SXGA+/UXGA

THC63LVD823 _Rev2.0
Switching Characteristics
Symbol
t_TCIT
t_TCIP
t_TCH
t_TCL
t_TS
t_TH
t_TCOP
t_LVT
t_TOP1
Parameter
CLK IN Transition time
CLK IN Period
CLK IN High Time
CLK IN Low Time
TTL Data Setup to CLK IN
TTL Data Hold from CKL IN
CLK OUT Period
Dual Link
Single Link
LVDS Transition Time
Output Data Position0 (t_TCOP = 7.4ns)
t_TOP0 Output Data Position1 (t_TCOP = 7.4ns)
t_TOP6 Output Data Position2 (t_TCOP = 7.4ns)
t_TOP5 Output Data Position3 (t_TCOP = 7.4ns)
t_TOP4 Output Data Position4 (t_TCOP = 7.4ns)
t_TOP3 Output Data Position5 (t_TCOP = 7.4ns)
t_TOP2
t_TPLL
t_OE
t_CK12
Output Data Position6 (t_TCOP = 7.4ns)
Phase Lock Loop Set
OE High to Data Valid
Skew Time between TCLK1+ and
TCLK2+
Min.
V_CC = 3.0V ~ 3.6V, Ta = -10 °C ~ +70 °C
Typ.
Max.
Units
5.0 ns
11.76
0.35t_TCIP
0.35t_TCIP
2.5
0.0
11.76
7.4
0.5t_TCIP
0.5t_TCIP
0.5
40.0 ns
0.65t_TCIP ns
0.65t_TCIP ns
ns
ns
40.0 ns
20.0 ns
ns
-0.15
0.0
+0.15 ns
-t-^T----^C_7---^O----^P- – 0.15
t--_{T---C-7---O----P-}
-t-^T----^C-7--^O----^P- + 0.15
ns
2t--^T----^C_7---^O----^P- – 0.15
2 ^t--T---^C-7---^O----^P-
2-t-^T---^C-7---^O----^P- + 0.15
ns
3-t-^T----^C_7---^O----^P- – 0.15
3 ^t--T---^C-7---^O----^P-
3-t-^T---^C-7---^O----^P- + 0.15
ns
4-t-^T----^C_7---^O----^P- – 0.15
4 ^t--T---^C-7---^O----^P-
4-t-^T---^C-7---^O----^P- + 0.15
ns
5-t-^T----^C_7---^O----^P- – 0.15
5 ^t--T---^C-7---^O----^P-
5-t-^T---^C-7---^O----^P- + 0.15
ns
6-t-^T----^C_7---^O----^P- – 0.15
6 ^t--T---^C-7---^O----^P-
6-t-^T---^C-7---^O----^P- + 0.15
ns
10.0 ms
50
ns
0.5 ns
AC Timing Diagrams
TTL Input
90%
CLK IN _10%
LVDS Output
V_diff=(TA+)-(TA-)
TA+
5pF _100Ω
TA-
LVDS Output Load
V_diff
t_TCIT
80%
20%
t_LVT
90%
10%
t_TCIT
80%
20%
t_LVT
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
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THine Electronics, Inc.