THC63LVD824A Datasheet, PDF (6/15 Pages) THine Electronics, Inc. – Single(112MHz)/Dual(170MHz) Link LVDS Receiver for XGA/SXGA/SXGA+/UXGA

THC63LVD824A _Rev1.20_E
Supply Current
Symbol
I_RCCW
I_RCCS
Parameter
Receiver Supply
Current
(Worst Case Pattern)
Receiver Power Down
Supply Current
V_CC = 3.0V ~ 3.6V, Ta = -10 °C ~ +70°C
Condition(*)
Typ. Max. Units
f_CLKOUT = 85MHz
MODE<1:0>=LL
CL=8pF,
Vcc=3.6V
225 mA
/PDWN = L
10 μA
Switching Characteristics
Symbol
t_RCP
Parameter
Dual-in / Dual-out
CLKOUT Period
Single-in / Dual-out
t_RCH CLKOUT High Time
t_RCL CKLOUT Low Time
t_RS TTL Data Setup to CLKOUT
t_RH TTL Data Hold from CKLOUT
t_TLH TTL Low to High Transition Time
t_THL TTL High to Low Transition Time
t_SK
Receiver Skew
Margin
CLKIN=85MHz
CLKIN=112MHz
t_RIP1 Input Data Position0
t_RIP0 Input Data Position1
t_RIP6 Input Data Position2
t_RIP5 Input Data Position3
t_RIP4 Input Data Position4
t_RIP3 Input Data Position5
t_RIP2
t_RPLL
t_RCIP
t_CK12
Input Data Position6
Phase Lock Loop Set
CLKIN Period
Skew Time between RCLK1 and
RCLK2
V_CC = 3.0V ~ 3.6V, Ta = -10 °C ~ +70°C
Min.
11.76
17.85
Typ.
t_RCIP
2t_RCIP
Max.
Units
40.0 ns
80.0 ns
t--_R----C---P-
ns
2
0.3t_RCP-0.5
0.3t_RCP-0.5
t--_R----C---P-
2
2.5
ns
ns
ns
4.0 ns
2.5
4.0 ns
-0.40
-0.25
-t_SK
+0.40 ns
+0.25 ns
0.0
+t_SK ns
t--_{R----C---I--P-}
7
–
t_SK
-t-^R----^C---^I--^P-
7
t--_{R----C---I--P-}
7
+
t_SK
ns
2 -t-^R----^C---^I--^P-
7
–
t_SK
2 -t-^R----^C---^I--^P-
7
2 -t-^R----^C---^I--^P-
7
+
t_SK
ns
3 -t-^R----^C---^I--^P-
7
–
t_SK
3 -t-^R----^C---^I--^P-
7
3 -t-^R----^C---^I--^P-
7
+
t_SK
ns
4 -t-^R----^C---^I--^P-
7
–
t_SK
4 -t-^R----^C---^I--^P-
7
4 -t-^R----^C---^I--^P-
7
+
t_SK
ns
5 -t-^R----^C---^I--^P-
7
–
t_SK
5 -t-^R----^C---^I--^P-
7
5 -t-^R----^C---^I--^P-
7
+
t_SK
ns
6 -t-^R----^C---^I--^P-
7
–
t_SK
6 -t-^R----^C---^I--^P-
7
6 -t-^R----^C---^I--^P-
7
+
t_SK
ns
10.0 ms
8.92
40.0 ns
± 0.3 t _{R C I P}
ns
Copyright©2014 THine Electronics, Inc.
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THine Electronics, Inc.