THC63LVDM83C-5S Datasheet, PDF (2/13 Pages) THine Electronics, Inc. – REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE

THC63LVDM83C(5S) _Rev.1.10_E
THC63LVDM83C(5S)
REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE
General Description
The THC63LVDM83C(5S) transmitter is designed to
support pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ resolutions.
The THC63LVDM83C(5S) converts 28bits of CMOS/
TTL data into LVDS(Low Voltage Differential Signal-
ing) data stream. The transmitter can be programmed
for rising edge or falling edge clocks through a dedi-
cated pin. At a transmit clock frequency of 85MHz,
24bits of RGB data and 4bits of timing and control data
(HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at
an effective rate of 595Mbps per LVDS channel.
Features
• Wide dot clock range: 8-85MHz suited for NTSC,
VGA, SVGA, XGA
• PLL requires no external components
• Supports spread spectrum clock generator
• On chip jitter filtering
• Clock edge selectable
• Supports reduced swing LVDS for low EMI
• Power down mode
• Low power single 3.3V CMOS design
• Low profile 56 Lead TSSOP Package
• 1.2 up to 3.3V tolerant data inputs to connect
directly to low power,low voltage application and
graphic processor.
• Backward compatible with
THC63LVDM83R(24bits)
Block Diagram
CMOS/TTL
INPUTS
TA0-6 ⁷
TB0-6 ⁷
TC0-6 ⁷
TD0-6 ⁷
TRANSMITTER
CLKIN
(8 to 85MHz)
R/F
/PDWN
RS
THC63LVDM83C(5S)
PLL
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
TD +/-
(56-595Mbit/On Each
LVDS Channel)
TCLK +/-
CLOCK
(LVDS)
8-85MHz
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