THV3056 Datasheet, PDF (13/32 Pages) THine Electronics, Inc. – 3ch Buck/Boost 2ch CP 1ch HVLDO 1ch LVLDO Controller

THV3056_Rev.2.00_E
Functional Description
● System UVLO
System UVLO stops IC operation when the input voltage decreases less than the user defined voltage.
UVLO(Undervoltage Lockout) prevents the device from the malfunction under the lower VCC voltage at which IC can
not operate normally. However in the actual system board, it is often required not to operate DC/DC controller IC under
the voltage which is defined by the individual system, even if the voltage is enough high for normal operation of the IC.
Utilizing System UVLO function, it is able to control the IC operation only with two external resistors. The below Figure
1 shows the example set at more than 4.0V(Vin), and Figure 2 shows the operation example of System UVLO.
After Input Power Supply Voltage(Vin) rises up to the release voltage of UVLO(4.27V in this example), the Soft Start
operation starts and the voltage on SS pin rises gradually. When the voltage reaches to 1.2V, Soft Start operation is fin-
ished and the output voltage reaches to the user defined voltage.
When input power supply voltage(Vin) drops to the system UVLO detection voltage (under 3.5V in this example), Sys-
tem UVLO stops all switching operations instantly and the voltage on SS pin will be pulled down to Gnd level. As switch-
ing operation stops, the output voltage decreases. The shut off mode by the detection of system UVLO will be released,
when Vin exceeds the system UVLO release voltage. (See Figure 2)
　 　 　 Release Voltage of System UVLO 　 　 　 　 ＝
1.22

R_----1_----+-----R_----2_-
R2
Detection Voltage of System UVLO 　
＝ _{1.0 } ^R----¹----+-----^R----²-
R2
Generally input power supply voltage(Vin) decreases when the output short circuit or over load.are detected. The decrease
of input power supply voltage resets the SCP. Please pay attention of setting the System UVLO voltage and the SCP timer
latch delay time.
Note1)
Please set the System UVLO voltage and SCP delay time in order that the shut off by SCP works earlier than System
UVLO operation. Otherwise, the following operation will be repeated:
Output short-circuit → Power-supply voltage decrease (UVLO operation) → Shut off by System UVLO
→ Short-circuit current decrease → Power-supply voltage rise (UVLO release) → Out put short circuit
remaining → Power-supply voltage decrease → Shut off by System UVLO
If System UVLO is not required, connect SYSUVLO pin with VREF or VREG5 pin.
In that case, only internal UVLO circuit will operates.
Vin
VCC
R1 82kΩ
SYSUVLO
R2 33kΩ
Figure 1. System UVLO Setting Example
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THine Electronics, Inc.