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U4080B Datasheet, PDF (9/15 Pages) TEMIC Semiconductors – Voice-Switched Circuit for Handsfree Operation
U4080B
When the large input signal is reduced, the current source
is turned off, and an internal 110 kΩ resistor discharges
the capacitor so the voltage at Pin 17 can return to its
normal value of 1.9 V dc. The capacitor also stabilizes the
peak limiting feedback loop. If there is a need to mute the
speaker amplifier without disabling the rest of the circuit,
this may be accomplished by connecting a resistor from
Pin 17 to ground. A 100 kΩ resistor will reduce the gain
by 34 dB (0 dB from SAI to SAO), and a 10 kΩ resistor
will reduce the gain by almost 50 dB.
Transmit Detector Circuit
The transmit detector circuit distinguishes speech (which
consists of bursts) from the background noise (a relatively
constant signal). It does this by storing a voltage level,
representative of the average background noise, in the
capacitor at CP1 (Pin 11). It has a time constant of approx-
imately 5 seconds (at Pin 11). The voltage at Pin 11 is
applied to the inverting input of the transmit detector
comparator. In the absence of speech signals, the non-
inverting input receives the same voltage level minus an
offset of 36 mV. In this condition, the output of the
comparator will be low, the the voltage at TDO (Pin 23)
will be at ground.
If the T-R comparator is in the transmit position, the atten-
uator will be in the idle mode (DVACF = 75 mV). When
speech is presented to the microphone, the signal burst ap-
pearing at TDI reaches the non-inverting input of the
transmit detector comparator before the voltage at the
inverting input can change, causing the output to switch
high, driving the voltage at TDI up to approximately 4 V.
This high level causes the attenuator control block to
switch the attenuators from the idle mode to the transmit
mode (assuming the T-R comparator is in the transmit
mode).
As long as the speech continues to arrive and is
maintained at a level above the background, the voltage
at TDO will be maintained at high level and the circuit
will remain in the transmit mode. The time constant of the
components at TDO will determine how much time the
circuit requires to return to the idle mode after the
cessation of microphone speech signals, which occurs
during the normal pauses in speech. The series resistor
and capacitor at TDI (Pin 13) determine the sensitivity of
the transmit detector circuit. Figure 10 indicates the
[ change in dc voltage levels at CP2 and CP1 in response
to
D
a steady state sine wave applied at Pin 13 (DVCP1
2.7 VCP2). Response time can be reduced by increasing
the resistor and decreasing the capacitor value at these
pins. The first amplifier (between TDI and CP2) regulates
a wide range of input signal levels due to AGC. Figure 7
indicates the dc transfer characteristics of the log amp.
Figure 11 shows the following series of events:
1. CP2 (Pin 12) follows the peaks of the speech signals
and decays at a rate determined by the 10 µA current
source and the capacitor at this pin.
2. CP1 (Pin 11) increases at a rate determined by the RC
at this pin after CP has made a positive transition. It
will follow the decay pattern of CP2.
3. The non-inverting of the transmit detector compara-
tor follows CP2, gained up by 2.7 and reduced by an
offset of 36 mV. This voltage, compared to CP1, de-
termines the output of the comparator.
4. TDO (Pin 23) will rise quickly to 4 V dc in response
to a positive transition at CP2, but will decay at a rate
determined by the RC at this pin. When TDO is above
3.25 V dc, the circuit will be in the transmit mode. As
it decays toward ground, the attenuators are taken to
the idle mode.
600
DVCP1
400
200
DVCP2
0
0
94 7876 e
600
50
100 150 200 250
VMICO ( mVrms )
Figure 9.
DVCP1
400
200
DVCP2
0
0
94 7876 e
50
100 150 200 250
VMICO ( mVrms )
Figure 10.
TELEFUNKEN Semiconductors
9 (15)
Rev. A1, 20-May-96
Preliminary Information