U4080B Datasheet, PDF (2/15 Pages) TEMIC Semiconductors – Voice-Switched Circuit for Handsfree Operation

U4080B
Pin Description
Pin Symbol
Function
1
R1 Load resistance.
Provides reference current for the
transmit and receive attenuators.
2 RTG Transmit attenuator nominal gain
resistor.
Transmit channel gain is inversely
proportional to the resistance RTG
connected to Pin 2.
3
TI Transmit attenuator input.
Input resistance is 5 kΩ
4
TO Transmit attenuator output.
Drives the input of the transmit level
detector and the external circuit which
drives the telephone line.
5
TLI Transmit level detector input.
Sets the detector level. Sensitivity to
transmit channel signals increases
when the value of the resistor
decreases.
6 TLO Transmit level detector output.
The external RC-element sets the time
the comparator will hold the system in
the transmit mode after speech ceases.
7
RLI Receive level detector input.
An external resistance connected to the
pin sets the detection level. Sensitivity
to receive channel signals increases
when the resistor decreases.
8 RLO Receive level detector output.
RC-element connected at the pin sets
the time the comparator will hold the
system in the receive mode after the
receive signal expires.
9 MIC Microphone amplifier input.
Input impedance is 10 kΩ and the bias
voltage is approximately equal to V_B.
10 MICO Microphone amplifier output.
Gain is set internally at 34 dB
(50 V/V).
11 CP1 RC circuit for holding background
noise level.
The transmit detector compares the
CP1 voltage with the speech signal
from CP2.
12 CP2 Capacitor for detecting the speech
signal for comparison with the
background noise held at Pin 11 (CP1).
13 TDI Transmit detector input.
The microphone amplifier output is
coupled to the TDI pin through an
external resistor.
Pin Symbol
Function
14 GND1 High current ground pin for the speaker
amplifier output stage.
GND1 voltage should be within 10 mV
of the ground voltage of Pin 22.
15 SAO Speaker amplifier output.
It will source and sink up to 100 mA
when ac coupled to the speaker. Gain is
set internally at 34 dB (50 V/V).
16 V+ DC supply.
17 AGC A capacitor from this pin to V_B
stabilizes the speaker amplifier gain
control loop, and additionally controls
the attack and decay time of this
circuit. The gain control loop limits the
speaker amp input to prevent clipping
at SAO. The internal resistance at the
AGC pin is nominally 110 kΩ.
18 CS Digital chip select input.
Logic O: VCC regulator is enabled
x when 0.7 V; Logic 1: Standby mode
y drawing 0.5 mA when 1.6 V
19 SAI Speaker amplifier input.
Input impedance is ca. 20 kΩ.
20 VCC Regulated output voltage (5.4 V).
It powers all circuits except the speaker
amplifier output. This voltage can be
used for an external circuit i.e., a
microprocessor where a filter capacitor
is required.
21
V_B Output voltage.
V_B is approximately VCC/2 and serves
as an analog ground to the speaker-
phone system.
22 GND2 Integrated circuit ground
(except for the speaker amplifier).
23 TDO Transmit detector output.
An external RC circuit holds the
system in the transmit mode during
pauses between words or phrases.
24 VCI Volume control input.
A variable resistor connected to this
pin provides receive mode volume
control.
25 ACF Attenuator control filter.
A connected capacitor reduces noise
transients as the attenuator control
switches levels of attenuation.
2 (15)
TELEFUNKEN Semiconductors
Preliminary Information
Rev. A1, 20-May-96