U2894B Datasheet, PDF (9/16 Pages) TEMIC Semiconductors – Modulation PLL for GSM, DCS and PCS Systems

Test Circuit
Baseband input
VDC
<450 mV_pp
VAC
1
2
1.35 V –VS1/2 +0.1 V
Modulator
3
LO input
50 Ω
4
Modulator
outputs
V_S
VSP
5
6
50 Ω 50 Ω
7
8
VDO
9
PFD
Pulse output
10
1 nF
11
12
PFD
input
13
50 Ω
14
U2894B
Baseband input
<450 mV_pp
VAC
28
VDC
27
1.35 V –VS1/2 +0.1 V
26
V_S
25
Mixer
output
24
23
50 Ω
22
Mixer
input
21
V_S
20
Mixer
LO input
19
18
17
16
PFD input
50 Ω
15
Mode control
Power–up
VS2
Bias voltage for ^VS
charge pump output:
R₁
R₂
0.5 V < VDO < VSP – 0.5 V
R₃
13315
Figure 12. Test circuit
Rev. A4, 30-Sep-98
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