U6081B Datasheet, PDF (3/8 Pages) TEMIC Semiconductors – PWM Power Control with Low Duty Cycle Switch Off

U6081B
+ V_T100 High switching threshold (100% duty cycle)
+ t _t V_{T 100} High switching threshold ( 100% duty cycle)
+ V_TL Low switching threshold
a a a ₁, ₂ and ₃ are fixed constant.
The above mentioned threshold voltages are calculated
for the following values given in the data sheet.
W V_Batt = 12 V, I_S = 4 mA, R₃ = 150 ,
a a a ₁ = 0.7, ₂ = 0.67 and ₃ = 0.28.
+ * W V_T100 (12 V 4 mA 150 )
[ 0.7 8 V
+ + _t V_{T 100} 11.4 V 0.67 7.6 V
+ + V_TL 11.4 V 0.28 3.2 V
For a duty cycle of 100%, an oscillator frequency, f, is as
follows:
Pins 5 and 6, Short-Circuit Protection and
Current Sensing
1. Short-Circuit Detection and Time Delay, t_d
The lamp current is monitored by means of an external
 ^{shunt resistor. If the lamp current exceeds the threshold}
for the short-circuit detection circuit (V_T2 90 mV), the
m ^{duty cycle is switched over to 100% and the capacitor C5}
is charged by a current source of 20 A (I_ch – I_dis). The
external FET is switched off after the cut-off threshold
(V_T5) is reached. Renewed switching on the FET is
possible only after a power-on reset. The current source,
I_dis, ensures that the capacitor C₅ is not charged by
parasitic currents. The capacitor C₅ is discharged by I_dis
to typ. 0.7 V.
Time delay, t_d, is as follows:
+ @ * ń * t_d C₅ (V_T5 0.7 V) (I_ch I_dis)
m With C₅ = 330 nF and V_T5 = 9.8 V, (I_ch – I_dis) = 20 A,
we have
+ @ * ń m t_d 330 nF (9.8 V 0.7 V) 20 A
+ 150 ms.
+f ₂
*^Iosc
(V_T100 V_TL)
++ m ^C2
,
whereas C₂
and I_osc
22 nF
40 A
Therefore:
+ _* ^m f
40 A
2 (8 V 3.2 V)
+ _{22 nF} 189 Hz
For a duty cycle of less than 100%, the oscillator
frequency, f, is as follows:
+f ₂
* ) ^Iosc
t ^(VT 100 ^VTL^{) C}2 ⁴
V_Batt
C₄
2. Current Limitation
The lamp current is limited by a control amplifier to pro-
tect the external power transistor. The voltage drop across
an external shunt resistor acts as the measured variable.
Current limitation takes place for a voltage drop of
[ V_T1 100 mV. Owing to the difference
[ ^VT1^–VT2 ^{10 mV it is ensured that current limitation}
occurs only when the short circuit detection circuit has
responded.
After a power-on reset, the output is inactive for an half
oscillator cycle. During this time, the supply voltage
capacitor can be charged so that the current limitation is
guaranteed in the event of a short circuit when the IC is
switched on for the first time.
whereas C₄ = 470 pF
m 40 A
+ _{* )} f _{2 (7.6 V 3.2 V) 22 nF 4 12 V 470 pF}
+ 185 Hz
A selection of different values of C₂ and C₄, provides a
range of oscillator frequency, f, from 10 to 2000 Hz.
Pins 7 and 8, Charge Pump and Output
Output, Pin 8, is suitable for controlling a power
MOSFET. During the active integration phase, the supply
current of the operational amplifier is mainly supplied by
the capacitor C₃ (bootstrapping). Additionally, a trickle
 ^{charge is generated by an integrated oscillator}
(f₇ 400 kHz) and a voltage doubler circuit. This
permits a gate voltage supply at a duty cycle of 100%.
TELEFUNKEN Semiconductors
3 (8)
Rev. A1, 14-Feb-97