U6081B Datasheet, PDF (2/8 Pages) TEMIC Semiconductors – PWM Power Control with Low Duty Cycle Switch Off

U6081B
Pin Description
V_{S 1}
GND ₂
V_{I 3}
Osc ₄
8 ^Output
7 ^{2 V}S
6 ^Sense
5 ^Delay
95 9944
Pin Symbol
Function
1
V_S Supply voltage V_S
2
GND IC ground
3
V_I Control input (duty cycle)
4
Osc Oscillator
5
Delay Short circuit protection delay
6
Sense Current sensing
7
2 V_S Voltage doubler
8
Output Output
Functional Description
Pin 1, Supply Voltage, V_s or V_Batt
Overvoltage Detection
Stage 1:
If V_Batt > 20 V occurs the external transistor will be
switched off and switched on again at V_Batt < 18.5 V
(hysteresis).
Stage 2:
If V_Batt > 28 V, the external transistor is switched on again
(load-dump protection). At the same time the voltage li-
mitation of the IC is reduced from V_S ≈ 26 V to V_S ≈ 20 V.
This leads to a hysteresis characteristic so that the load-
dump detection is switched off again only at V_Batt < 23 V.
In this case the short–circuit protection is not in operation.
Undervoltage Detection
In the event of voltages of approximately V_Batt < 5.0 V,
the external FET is switched off and the latch for short-
circuit detection is reset.
 ^{A hysteresis ensures that the FET is switched on again at}
approximately V_Batt 5.4 V.
Pin 2, GND
Ground-Wire Breakage
W ^{To protect the FET in the case of ground-wire breakage,}
a 820-k resistor between gate and source is recom-
mended to provide proper switch-off conditions.
Pin 3, Control Input
W ^{The pulse width is controlled by means of an external}
potentiometer (47 k ). The characteristic (angle of
rotation/duty cycle) is linear. The duty cycle can be varied
from 0 to 100%. To avoid inadmissibly high filament cold
currents, the dimmer is switched off at duty cycles of
approximately < 10% or is switched on only at duty
cycles of approximately > 13% (hysteresis). It is possible
to further restrict the duty cycle with the resistors R₁ and
x ^{R2 (see figure 2). Pin 3 is protected against short-circuit}
to V_Batt and ground GND (V_Batt 16.5 V).
Output Slope Control
The rise and fall time (t_r, t_f) of the lamp voltage can be
limited to reduce radio interference. This is done with an
integrator which controls a power MOSFET as source
follower. The slope time is controlled by an external
capacitor C4 and the oscillator current (see figure 2).
Calculation:
+ + t_f
t_r V_Batt
C₄
I_osc
m With V_Batt = 12 V, C₄ = 470 pF and I_osc = 40 A, we thus
obtain a controlled slope of
+ + + ^{470 pF}
m ^{tf tr 12 V} 40 A
141 ms
W A 100- resistor in series to C4 is recomended to damp
device oscillations (see figure 2).
Pin 4, Oscillator
The oscillator determines the frequency of the output
voltage. This is defined by an external capacitor, C₂. It is
charged with a constant current, I, until the upper
switching threshold is reached. A second current source
is then activated which taps a double current, 2 I, from
the charging current. The capacitor, C₂, is thus discharged
by the current, I, until the lower switching threshold is
reached. The second source is then switched off again and
the procedure starts again.
Example for oscillator frequency calculation:
+ a + * a V_T100
V_S
1 ^(VBatt
I_S
R₃)
1
+ a + * a _¦ V_{T 100}
V_S
2 ^(VBatt
I_S
R₃)
2
+ a + * a V_TL V_S
3 ^(VBatt
I_S
R₃)
3
where
2 (8)
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97