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U3770M Datasheet, PDF (2/5 Pages) TEMIC Semiconductors – CT2 I/Q Modulator and Clock Circuitry
U3770M
Functional Description
U3770M has been designed to reduce power consumption
and cost of CT2 devices. An innovative CMOS I,Q modu-
lator with an extremely low current provides all the
advantages of I,Q modulation:
– No requirement for FM deviation tuning
– Eliminates the Gaussian filter
– Simplifies the power ramping control
The modulated output carrier can be programmed to be
0.8 MHz or 1.6 MHz by the PROG control pin.
The typical supply voltage is 3 V @ 4 mA.
To reduce overall system cost, an internal PLL generates
a 18.432 MHz clock signal from the system 12.8 MHz
reference oscillator. This way, only one crystal oscillator
is needed in the complete CT2 device.
Internally, the 12.8 MHz reference signal is fed into a
shaping amplifier and then into two logic dividers, to gen-
erate a 512 kHz and a programmable 3.2 or 6.4 MHz
clock. This clock is divided by 4 by two D flip-flops. The
flip-flop outputs drive the four analog switches in quadra-
ture. A pair of analog switches make a local oscillator
(LO) suppression mixer. By summing the other pair out-
puts, we obtain both LO and sideband suppression, of
more than –26 dBc.
The 512 kHz clock drives a frequency synthesizer. The
VCO runs at a fixed frequency of 18.432 MHz. The VCO
control voltage (LF pin) controls the VCO frequency.
Pin Description
DNC 1
16 DNC
FRef in 2
15 DNC
VDD 3
14 CLKout
DGND 4
13 AGND
QB 5
12 PROG
Q6
11 LF
IB 7
10 TST
I8
9 MODout
95 9930
Figure 2. Pinning
Pin
2
3
4
5
6
7
8
9
10
11
12
13
14
1, 15,
16
Symbol
FRef in
VDD
DGND
QBin
Qin
IBin
Iin
MODout
TST
LF
PROG
AGND
CLKout
DNC
Function
External 12.8 MHz reference
frequency input
Supply voltage
Digital ground
Analog switches input
Analog switches input
Analog switches input
Analog switches input
Modulator output signal
Test input, must be connected to
GND (only factory use)
PLL loop filter
PROG = 0, 1.6 MHz mode
PROG = 1, 0.8 MHz mode
Analog ground
Digital CMOS clock output
18.432 MHz
Do not connect
2 (5)
MATRA MHS
Rev. A2, 03-Dec-97