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U2102B Datasheet, PDF (11/16 Pages) TEMIC Semiconductors – Multifunction Timer
U2102B
Parameters
Test Conditions / Pin Symbol Min. Typ. Max. Unit
Window discriminator
Input current
v v " 0 V V8 Vl Pin 8
Ii
Upper threshold
Pins 8 and 9 VTU
Lower threshold
v v Input current window adjustment 0 V V9 V1
Pin 9
"VTL
Ii
500
@ @ 0.55 VRef + (0.2 V9)
@ @ 0.45 VRef – (0.2 V9)
500
nA
V
nA
Minimum window:
Lower threshold
Upper threshold
Maximum window:
Lower threshold
Upper threshold
Enable-Schmitt trigger
Input current
Enable threshold
V9 = V13
Pin 8
VTL1 2.05 2.75
2.45
V
VTU1 2.55 3.75
2.95
V9 = V1
Pin 8
VTL2
1.1
1.25
1.4
V
VTU2 3.4
3.75
4.1
Pin 7
v v 0 V V7 Vl
"Ii
500
nA
VT
2.3
2.5
2.7
V
Blocking threshold:
Output stage OFF
Output stage ON, except in the
case of two-stage reverse phase
control in second stage (a)
VT
1.8
2
2.2
V
0.45 0.5
0.55
Threshold for test mode
VT
85
100
115
mV
Current monitoring
Input current
Switch-off threshold 1
Switch-off threshold 2
Switching output
Leakage current
Saturation voltage
Push-pull output stage
Pin 11
v v 0 V V11 V1
"Ii
500
nA
VT1
80
100
120
mV
VT2
450
500
550
mV
Pin 12
v V11 < 450 mV, V12 V15 Ilkg
1
mA
V11 > 550 mV
I12 = 0.5 mA
VSat
I12 = 10 mA
VSat
1.0
V
1.2
V
Upper saturation voltage,
ON state
I14 = – 10 mA
– VSat
Pins 14 and 15
2.4
V
Lower saturation voltage,
OFF state
I14 = 10 mA
Pin 14 VSatL
1.2
V
Output current
ON state
Pin 14 –IO
50
OFF state
IO
50
mA
TELEFUNKEN Semiconductors
Rev. A1, 30-May-96
11 (16)