U2893B Datasheet, PDF (10/14 Pages) TEMIC Semiconductors – Modulation PLL for GSM, DCS and PCS Systems

U2893B
Test Circuit
<450 mVpp
VAC
1.35 V –
VS1/2 + 0.1 V ^VDC
Modulator
50
LO input
Modulator
outputs
VS
VSP
VDO
PFD
Pulse output
50
50
50
1n
PFD input
50
Baseband inputs
1I
Ì _{2 NI}
Ì _{3 MDLO}
4 _GND
5 _MDO
6 _NMDO
7 _VS1
8 _VSP
9 _CPO
10 _GNDP
11 _CPC
12 _PUMIX
13 _RD
14 _NRD
Q ²⁸
NQ ²⁷
VS3 ²⁶
MIXO ²⁵
GND ²⁴
NRF ²³
RF ²²
VS2 ²¹
MIXLO ²⁰
PU ¹⁹
GND ¹⁸
NND ¹⁷
ND ¹⁶
MC ¹⁵
Bias voltage for
VS
charge pump output:
0.5 V < VDO < VSP – 0.5 V
Power-up
Mode control
VS2
R1
R2
R3
Figure 15. Test circuit
<450 mVpp
VAC
1.35 V –
VDC _{VS1/2 + 0.1 V}
VS
Mixer
output
50
Mixer
input
VS
Mixer
LO input
PFD input
50
13315
10 (14)
TELEFUNKEN Semiconductors
Preliminary Information
Rev. A1, 29-Jan-76