C0402C0G1C560JT Datasheet, PDF (11/34 Pages) TDK Electronics – MULTILAYER CERAMIC CHIP CAPACITORS

(continued)
No.
Item
Performance
16 Moisture External
No mechanical damage.
Resistance appearance
Capacitance
Characteristics
Change from the
value before test
Class1
CH
C0G
±7.5% or ±0.75pF,
whichever larger.
JB
X5R
*Class2
X6S
X7R
X7S
X7T
± 10 %
± 12.5 %
± 25 %
* Applied for some parts.
Q
(Class1)
Rated Capacitance
Q
30pF and over
200 min.
Under 30pF 100+10/3×C min.
C : Rated capacitance (pF)
D.F.
(Class2)
200% of initial spec. max.
Insulation
Resistance
500MΩ or 25MΩ·μF min.
(As for the capacitors of rated
voltage 16, 10V DC and lower, 500
MΩ or 5MΩ·μF min.,) whichever
smaller.
Test or inspection method
Reflow solder the capacitors on a
P.C.Board shown in Appendix1a or
Appendix 1b before testing.
Apply the rated voltage at
temperature 40±2°C and 90 to
95%RH for 500 +24,0h.
Charge/discharge current shall not
exceed 50mA.
Leave the capacitors in ambient
condition for 6 to 24h (Class1) or
24±2h (Class2) before measurement.
Voltage conditioning (only for class 2)
Voltage treat the capacitors under
testing temperature and voltage for 1
hour.
Leave the capacitors in ambient
condition for 24±2h before
measurement.
Use this measurement for initial
value.
— 10 —