73K302L Datasheet, PDF (1/29 Pages) TDK Electronics – Single-Chip Modem

DESCRIPTION
The 73K302L is a highly integrated single-chip
modem IC which provides the functions needed to
construct a Bell 202, 212A and 103 compatible
modem. The 73K302L is an enhancement of the
73K212L single-chip modem with Bell 202 mode
features added. The 73K302L is capable of 1200 or
0-300 bit/s full-duplex operation over dial-up lines.
4-wire full-duplex capability and a low speed back
channel are also provided in Bell 202 mode. The
73K302L recognizes and generates a 900 Hz soft
carrier turn-off tone, and allows 103 for 300 bit/s
FSK operation. The 73K302L integrates analog,
digital, and switched-capacitor array functions on a
single substrate, offering excellent performance and
a high level of functional integration in a single
28-pin DIP or PLCC package. The 73K302L
operates from a single +5V supply with very low
power consumption.
The 73K302L includes the DPSK and FSK
modulator/demodulator functions, call progress and
handshake tone monitors, test modes, and a tone
generator capable of producing DTMF, answer, and
900 Hz soft carrier turn-off tone. This device
supports Bell 202, 212A and 103 modes of
operation, allowing both synchronous and
(continued)
73K302L
Bell 212A, 103, 202
Single-Chip Modem
FEATURES
April 2000
• One-chip Bell 212A, 103 and 202S/T standard
compatible modem data pump
• Full-duplex operation at 0-300 bit/s (FSK), 1200 bit/s
(DPSK) or 0-1200 bit/s (FSK) forward channel with or
without 0-150 bit/s back channel
• Full-duplex 4-wire operation in Bell 202 mode
• Pin and software compatible with other TDK
Semiconductor Corporation K-Series 1-chip
modems
• Interfaces directly with standard microprocessors
(8048, 80C51 typical)
• Serial port for data transfer
• Both synchronous and asynchronous modes of
operation
• Call progress, carrier, precise answer tone
(2225 Hz), soft carrier turn-off (SCT), and FSK mark
detectors
• DTMF, answer, and SCT tone generators
• Test modes available: ALB, DL, RDL, Mark, Space,
Alternating bit patterns
• CMOS technology for low power consumption using
60 mW @ 5V from a single power supply
BLOCK DIAGRAM
AD0-AD7
DATA
BUS
BUFFER
RD
WR
ALE
CS
RESET
READ
WRITE
CONTROL
LOGIC
INT
TXD
RXD
STATUS
AND
CONTROL
LOGIC
8-BIT
BUS
FOR
CONTROL
AND
STATUS
SERIAL
PORT
FOR
DATA
DIGITAL
PROCESSING
TESTS:
ALB, DLB
RDLB
PATTERNS
CLOCK
GENERATOR
FSK
MODULATOR/
DEMODULATOR
PSK
MODULATOR/
DEMODULATOR
SMART
DIALING
&
DETECT
FUNCTIONS
POWER
DTMF &
TONE
GENERATORS
TRANSMIT
FILTER
RECEIVE
FILTER
TXA
RXA