CC1110FX Datasheet, PDF (165/240 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, Sub-1 GHz RF Transceiver, and USB Controller

The I²S will provide bits from the internal 16-bit
buffer until the buffer is empty. If the buffer
becomes empty and the master still requests
more bits, the I²S will send 0’s (low order bits).
If more than 16 bits are being received, the low
order bits are discarded.
13.15.10 Mono
The I²S also supports mono audio samples.
To receive mono samples, I2SCFG0.RXMONO
should be set to 1. Words from the right
channel will then not be read into the data
registers. This feature is included because
some mono devices repeat their audio data in
both channels and the left channel is the
default mono channel.
To send mono samples, I2SCFG0.TXMONO
should be set to 1. Each word will then be
repeated in both channels before a new word
is fetched from the data registers. This is to
enable sending a mono audio signal to a
stereo audio sink device.
13.15.11 Word Counter
The I²S contains a 10-bit word counter, which
is counting transitions on the WS line. The
counter can be cleared by triggers or by writing
to the I2SWCNT register. When a trigger
occurs, or a value is written to I2SWCNT, the
current value of the word counter is copied into
the
I2SSTAT.WCNT[9:8]:I2SWCNT.WCNT[7:0]regi
sters and the word counter is cleared.
Three triggers can be used to copy/clear the
word counter.
• USB SOF: USB Start of Frame. Occurs
every ms (CC1111Fx only)
• T1_CH0: Timer 1, compare, channel 0
• IOC_1: IO pin input transition (P1_3)
Which trigger to use is configured through the
TRIGNUM field in the I2SCFG1 register. When
the I²S is configured not to use any trigger
(I2SCFG1.TRIGNUM=0), the word counter can
only be copied/cleared from software.
The word counter will saturate if it reaches its
maximum value. Software should configure the
trigger-interval and sample-rate to ensure this
never happens.
CC1111Fx: The word counter is typically used to
calculate the average sample rate over a long
period of time (e.g. 1 second) needed by
adaptive isochronous USB endpoints. The
USB SOF event must then be used as trigger.
CC1110Fx / CC1111Fx
13.15.12 µ-Law Compression and Expansion
The I²S interface can be configured to perform
µ-Law compression and expansion. µ-Law
compression is enabled by setting the
I2SCFG0.ULAWC bit to 1 and µ-Law
expansion is enabled by setting the
I2SCFG0.ULAWE bit to 1.
When the I²S interface is enabled, i.e. the
I2SCFG0.ENAB bit is 1, and µ-Law expansion
is enabled, every byte of µ-Law compressed
data written to the I2SDATH register is
expanded to a 16-bit sample before being
transmitted. When the I²S interface is enabled
and µ-Law compression is enabled each
sample received is compressed to an 8-bit µ-
Law sample and put in the I2SDATH register.
When the I²S interface is disabled, i.e. the
I2SCFG0.ENAB bit is 0, it can still be used to
perform µ-Law compression/expansion for
other resources in the system. To perform an
expansion, I2SCFG0.ULAWE must be 1 and
I2SCFG0.ULAWC must be 0 before writing a
byte of compressed data to the I2SDATH
register. The expansion takes one clock cycle
to perform, and then the result can be read
from the I2SDATH:I2SDATL registers.
To perform a compression I2SCFG0.ULAWE
must be 01 and I2SCFG0.ULAWC must be 1.
To start the compression, an un-compressed
16-bit sample should be written to the
I2SDATH:I2SDATL
registers.
The
compression takes one clock cycle to perform,
and then the result can be read from the
I2SDATH register.
Only one of the flags I2SCFG0.ULAWC and
I2SCFG0.ULAWE should be set to 1 when the
I2SCFG0.ENAB bit is 0.
13.15.13 I²S Registers
This section describes all the registers used for
I²S control and status. The I²S registers reside
in XDATA memory space in the region 0xDF40-
0xDF48. Table 33 on page 52 gives an
overview of register addresses while the tables
in this section describe each register. Notice
that the reset values for the registers reflect a
configuration with 16-bit stereo samples and
44.1 kHz sample rate. The I²S is not enabled at
reset.
SWRS033E
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