SM59364 Datasheet, PDF (9/19 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller

SyncMOS Technologies International, Inc.
ISP Flash Data Register (ISPFD, $F6)
SM59364
8-Bits Micro-controller
64KB ISP flash & 1KB RAM embedded
bit-7
bit-0
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
Read / Write:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value:
0
0
0
0
0
0
0
0
FD7 ~FD0 : flash data for ISP function
The ISPFD provide the 8-bit data for ISP function
ISP Flash Control Register (ISPC, $F7)
Read / Write:
Reset value:
bit-7
START
R/W
0
Unused
-
*
Unused
-
*
Unused
-
*
Unused
-
*
Unused
-
*
ISPF1
R/W
0
bit-0
ISPF0
R/W
0
F[1: 0]: ISP function select bit
START: ISP function start bit
= 1: start ISP function which indicated by bit 1, bit 0 (F1, F0)
= 0: no operation
The START bit is read-only by default, software must write three specific values 55H, AAH and 55H sequentially to the
ISPFD register to enable the START bit write attribute. That is:
MOV ISPFD, #55H
MOV ISPFD, #0AAH
MOV ISPFD, #55H
Any attempt to set START bit will not be allowed without the procedure above.
After START bit set to 1 then the SM59364 hardware circuit will latch address and data bus and hold the program
counter until the START bit reset to 0 when ISP function finished. User does not need to check START bit status by
software method.
F[1:0]
00
01
10
11
ISP function
Byte program
Chip protect
Page erase
Chip erase
F[1:0]: ISP function select bit
One page of flash memory is 512 byte.
To perform byte program/page erase ISP function, user need to specify flash address at first. When performing page
erase function, SM59364 will erase entire page which flash address indicated by ISPFAH & ISPFAL registers located
within the page.
e.g. flash address: $XYMN
Specifications subject to change without notice contact your sales representatives for the most recent information.
IDMMX-0033
Ver B SM59364 04/2008
9