SM59364 Datasheet, PDF (7/19 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller

SyncMOS Technologies International, Inc.
1.2.2 Data Memory - Higher 128 byte ($80 to $FF)
SM59364
8-Bits Micro-controller
64KB ISP flash & 1KB RAM embedded
The address $80 to $FF can be accessed by indirect addressing mode .
Address $80 to $FF is data area.
1.2.3 Data Memory - Expanded 768 bytes ($0000 to $02FF)
From external address $0000 to $02FF is the on-chip expanded RAM area, total 768 bytes. This area can be accessed
by external direct addressing mode (by instruction MOVX).
If the address of instruction MOVX @DPTR is larger than $02FF then SM59364 will generate the external memory
control signal automatically. The bit 1 (OME) of special function register $BF (SCONF) can enable or disable this
expanded 768 byte RAM. The default setting of OME bit is 1 (enable).
System Control Register (SCONF, $BF)
Read / Write:
Reset value:
bit-7
WDR
R/W
0
Unused
-
*
Unused
-
*
Unused
-
*
DFEN
-
*
ISPE
R/W
0
OME
R/W
1
bit-0
ALEI
R/W
0
WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1.
ISPE: ISP function enable bit
OME: 768 bytes on-chip RAM enable bit .
ALEI: ALE output inhibit bit, to reduce EMI .
Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz output to the ALE pin.
The bit 1 (OME) of SCONF can enable or disable the on-chip expanded 768 byte RAM. The default setting of OME bit is 1
(enable).
The bit 7 (WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT overflow. User
should check WDR bit whenever un-predicted reset happened.
2. In-System Programming (ISP) Function
The SM59364 can generate flash control signal by internal hardware circuit. User utilize flash control register, flash
address register and flash data register to perform the ISP function without removing the SM59364 from the system.
The SM59364 provides internal flash control signals which can do flash program/chip erase/page erase/protect
functions. User need to design and use any kind of interface which SM59364 can input data. User then utilize ISP
service program to perform the flash program/chip erase/page erase/protect functions.
2.1 ISP Service Program
The ISP service program is a user developed firmware program which resides in the ISP service program space. After
user developed the ISP service program, user then determine the size of the ISP service program. User need to
program the ISP service program in the SM59364 for the ISP purpose.
The ISP service program were developed by user so that it should includes any features which relates to the flash
memory programming function as well as communication protocol between SM59364 and host device which output
data to the SM59364. For example, if user utilize UART interface to receive/transmit data between SM59364 and host
Specifications subject to change without notice contact your sales representatives for the most recent information.
IDMMX-0033
Ver B SM59364 04/2008
7