SM39R04G1 Datasheet, PDF (4/47 Pages) SyncMOS Technologies,Inc – 4K Bytes on-chip flash program memory

Pin Configuration
SM39R04G1
8-Bit Micro-controller
4KB with ISP Flash
& 256B RAM embedded
INT0/T0/RXD/P3.0 1
INT1/T1/TXD/P3.1 2
P1.2/XTAL2 3
P1.3/XTAL1 4
INT0/P3.2 5
INT1/P3.3 6
VSS 7
14 VCC
13 P3.7/INT1/T1
12 RESET(default)/P3.6/INT0/T0
11 P3.5/T1
10 P3.4/T0
9 P1.1/SCL
8 P1.0/SDA
INT0/T0/RXD/P3.0 1
INT1/T1/TXD/P3.1 2
P1.2/XTAL2 3
P1.3/XTAL1 4
INT0/P3.2 5
INT1/P3.3 6
VSS 7
14 VCC
13 P3.7/INT1/T1
12 RESET(default)/P3.6/INT0/T0
11 P3.5/T1
10 P3.4/T0
9 P1.1/SCL
8 P1.0/SDA
INT0/T0/RXD/P3.0 1
10 VCC
INT1/T1/TXD/P3.1 2
9 P3.7/INT1/T1
XTAL2/P3.2 3
8 RESET(default)/P3.6/INT0/T0
XTAL1/P3.3 4
7 P3.5/SCL
VSS 5
6 P3.4/SDA
Notes：
1. The pin Reset/P3.6 factory default is Reset, user must keep this pin at low during power-up. User can configure it to
GPIO (P3.6) by a flash programmer.
2. To avoid accidentally entering ISP-Mode(refer to section 13.4), care must be taken not asserting pulse signal at P3.0
during power-up while “ISP active pin” (14L at P3.7，10L at P3.3) are set to high.
3. To apply ICP function, SDA and SCL must be set to Bi-direction mode if they are configured as GPIO in system.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M053
4
Ver.H SM39R04G1 08/2013