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LP1030D Datasheet, PDF (2/3 Pages) Supertex, Inc – 300V, Dual P-Channel Enhancement-Mode Lateral MOSFET
◁
LP1030D
P-Channel Electrical Characteristics (Tj = 25°C unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
-300
-
-
V
VGS = 0V, ID = -2.0mA
VGS(th) Gate threshold voltage
-1.4 -1.7 -2.4
V
VGS = VDS, ID = -1.0mA
ΔVGS(th) Change in VGS(th) with temperature
-
-
5.0 mV/°C VGS = VDS, ID = -1.0mA
RGS Gate-to-source shunt resistor
15
-
45
kΩ IGS = -100µA
VZ Gate-to-source Zener voltage
16
-
-
V
IGS = -1.0mA
IDSS Zero gate voltage drain current
-
-
-10
µA VGS = 0V, VDS = Max rating
-
-
-1.0
mA
VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current
-50
-
-
mA VGS = -7.0V, VDS = -25V
RDS(ON) Static drain-to-source on-state resistance
-
180
-
Ω
VGS = -7.0V, ID = -20mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
-
10.8
-
-
4.2
-
-
3.1
-
VGS = 0V,
pF VDS = -25V,
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
-
1.0
-
-
11.5
-
-
3.8
-
-
16
-
VDD = -25V,
ns ID = -50mA,
RGEN = 25Ω
VSD Diode forward voltage drop
-
-
-1.8
V
VGS = 0V, ISD = -25mA
trr
Reverse recovery time
-
300
-
ns
VGS = 0V, ISD = -25mA
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V
10%
INPUT
-10V
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tf
0V
OUTPUT
VDD
10%
90%
90%
10%
Pulse
Generator
RGEN
INPUT
D.U.T.
OUTPUT
RL
VDD
Block Diagram
S12
G1
D1
Doc.# DSFP-LP1030D
A031414
G2
D2
2
Supertex inc.
www.supertex.com
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