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| LP0701 Datasheet, PDF (1/4 Pages) Supertex, Inc – P-Channel Enhancement-Mode Lateral MOSFET | |||
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LP0701
Low Threshold
P-Channel Enhancement-Mode
Lateral MOSFET
Ordering Information
BVDSS /
BVDGS
-16.5V
RDS(ON)
(max)
1.5â¦
ID(ON)
(min)
-1.25A
VGS(th)
(max)
-1.0V
Order Number / Package
TO-92
SO-8
Die
LP0701N3 LP0701LG
LP0701ND
Features
Ultra low threshold
High input impedance
Low input capacitance
Fast switching speeds
Low on resistance
Freedom from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Advanced MOS Technology
These enhancement-mode (normally-off) transistors utilize a lat-
eral MOS structure and Supertexâs well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and negative temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown. The low threshold voltage and low on-
resistance characteristics are ideally suited for hand held battery
operated applications.
Applications
Logic level interfaces
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
± 10V
-55°C to +150°C
300°C
SGD
TO-92
NC 1
NC 2
S3
G4
8D
7D
6D
5D
SO-8
top view
Note: See Package Outline section for dimensions.
7-23
(Note 1)
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