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STM32L051X6 Datasheet, PDF (95/127 Pages) STMicroelectronics – Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0+, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC
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STM32L051x6 STM32L051x8
Electrical characteristics
SPI characteristics
Unless otherwise specified, the parameters given in the following tables are derived from
tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage
conditions summarized in Table 23.
Refer to Section 6.3.12: I/O current injection characteristics for more details on the
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 70. SPI characteristics in voltage Range 1 (1)
Symbol
Parameter
Conditions
Min
Typ Max Unit
Master mode
16
Slave mode
receiver
-
-
16
fSCK
1/tc(SCK)
SPI clock frequency
Slave mode
Transmitter
1.71<VDD<3.6V
-
-
12(2) MHz
Slave mode
Transmitter
-
2.7<VDD<3.6V
-
16(2)
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%
tsu(NSS)
NSS setup time
Slave mode, SPI
presc = 2
4*Tpclk
-
-
th(NSS)
NSS hold time
Slave mode, SPI
presc = 2
2*Tpclk
-
-
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
Tpclk-2
Tpclk
Tpclk+
2
tsu(MI)
Data input setup time
Master mode
0
-
-
tsu(SI)
Slave mode
3
-
-
th(MI)
th(SI)
Data input hold time
Master mode
Slave mode
7
-
3.5
-
-
-
ns
ta(SO
Data output access time
Slave mode
15
-
36
tdis(SO)
Data output disable time
Slave mode
10
-
30
tv(SO)
Slave mode
1.65 V<VDD<3.6 V
-
Data output valid time
Slave mode
2.7 V<VDD<3.6 V
-
18
41
18
25
tv(MO)
Master mode
-
4
7
th(SO)
Data output hold time
Slave mode
10
-
-
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2.
The maximum SPI clock
which has to fit into SCK
frequency in slave
low or high phase
transmitter
preceding
mode is
the SCK
dseatmerpmliningeeddbgyet.hTehsisumvaolufetvc(SaOn)
and
be
tsu(MI)
achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%.
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