ST40RA Datasheet, PDF (93/94 Pages) STMicroelectronics – 32-bit Embedded SuperH Device

Revision history
Version
ST40RA
Comments
Tables revised
Table 1 Subsystem configuration registers: SYS_STAT1
added
Table 8 Clock domains: CLOCKGEN_B12 bit reserved,
EMI_CLK target frequency range added
Table 9 CLOCKGENB.CLK_SELCR bit allocation: LMI_SEL
bit reserved
Table 10 Supported operating frequencies: recommended
operation codes changed
Table 15 CPG.STBCR2 register definition, comment added
about stopping the store queue and UBC
Table 24 EMI.GENCFG register, footnote added about EWAIT
signal
Table 28 SYSCONF2 definitions: field names changed,
LMI_SDRAM_DATA_DRIVE, LMI_SDRAM_ADD_DRIVE
Table 30 Absolute maximum ratings: New symbol VIORTC
and note added
Table 31 Operating conditions: PD and PDlp removed
Table 33 I/O maximum capacitive and DC loading: pad types
C2A and C2B replace C2
Table 34 PCI AC timings: tPCIHAOV max now 10 and min 1
Table 44 PBGA ballout for ST40RA: CLKIN, CLKOSC,
LPCLKIN, LPCLKOSC BPN numbers changed and pad types
changed for some pins.
Table 44 PBGA ballout for ST40RA: footnote added for
EWAIT pin.
Figures revised
Figure 5 ST40RA clock architecture: some labels changed
Figure 19 Package layout (viewed through package)
93/94 STMicroelectronics
ADCS 7260755H