PSD813F1V Datasheet, PDF (93/110 Pages) STMicroelectronics – Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 3.3V

PSD813F1V
Table 58. WRITE Timing (3V devices)
Symbol
Parameter
Conditions
-15
Min Max
-20
Unit
Min Max
t_LVLX
ALE or AS Pulse Width
26
30
t_AVLX
Address Setup Time
(Note ¹)
10
12
ns
t_LXAX
Address Hold Time
(Note ¹)
12
14
ns
t_AVWL
Address Valid to Leading
Edge of WR
(Notes ^1,3)
20
25
ns
t_SLWL
CS Valid to Leading Edge of WR
(Note ³)
20
25
ns
t_DVWH WR Data Setup Time
(Note ³)
45
50
ns
t_WHDX WR Data Hold Time
(Note ³)
8
10
ns
t_WLWH WR Pulse Width
(Note ³)
48
53
ns
t_WHAX1 Trailing Edge of WR to Address Invalid
(Note ³)
12
17
ns
t_WHAX2 Trailing Edge of WR to DPLD Address Invalid
(Note ^3,6)
0
0
ns
t_WHPV
Trailing Edge of WR to Port Output
Valid Using I/O Port Data Register
(Note ³)
45
50 ns
t_DVMV
Data Valid to Port Output Valid
Using Macrocell Register Preset/Clear
(Notes ^3,5)
90
100 ns
t_AVPV
Address Input Valid to Address
Output Delay
(Note ²)
48
55 ns
t_WLMV
WR Valid to Port Output Valid Using
Macrocell Register Preset/Clear
(Notes ^3,4)
90
100 ns
Note: 1. Any input used to select an internal PSD function.
2. In multiplexed mode, latched address generated from ADIO delay to address output on any port.
3. WR has the same timing as E, LDS, UDS, WRL, and WRH signals.
4. Assuming data is stable before active WRITE signal.
5. Assuming WRITE is active before data becomes valid.
6. TWHAX2 is the address hold time for DPLD inputs that are used to generate Sector Select signals for internal PSD memory.
Table 59. Flash Program, WRITE and Erase Times (5V devices)
Symbol
Parameter
Min.
Typ.
Flash Program
8.5
Flash Bulk Erase¹ (pre-programmed)
3
Flash Bulk Erase (not pre-programmed)
10
t_WHQV3
t_WHQV2
t_WHQV1
Sector Erase (pre-programmed)
Sector Erase (not pre-programmed)
Byte Program
Program / Erase Cycles (per Sector)
1
2.2
14
100,000
t_WHWLO
Sector Erase Time-Out
100
t_Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)²
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid t_Q7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
Max.
30
30
1200
30
Unit
s
s
s
s
s
µs
cycles
µs
ns
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