AN4650 Datasheet, PDF (92/102 Pages) STMicroelectronics – This document is intended to provide usage information

First-in first-out (FIFO) buffer
AN4650
8.6
FIFO threshold
The FIFO threshold is a functionality of the LSM6DS3 FIFO which can be used to check
when the number of samples in the FIFO reaches a defined threshold level.
The bits FTH_[11:0] in the FIFO_CTRL1 and FIFO_CTRL2 registers contain the threshold
level. The resolution of the FTH_[11:0] field is two bytes (1 LSB = 2 Bytes, each sample is
represented as 16-bit data). So, the user can select the desired level in a range between 0
and 4095.
The bit FTH in the FIFO_STATUS2 register represents the watermark status. This bit is set
high if after the next FIFO write operation the number of samples in the FIFO reaches or
exceeds the watermark level (each sample is represented as 16-bit data). When the FIFO is
configured in Continuous mode or in Bypass-to-Continuous mode, the FTH bit can be used
to catch when the number of samples in the FIFO reaches the threshold level. In the other
FIFO modes, the FIFO_FULL bit in the FIFO_STATUS2 register has to be used for this
purpose.
FIFO size can be limited to the threshold level by setting the STOP_ON_FTH bit in the
CTRL4_C register to 1.
Figure 29. FIFO threshold (STOP_ON_FTH = 0)
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Figure 29 shows an example of FIFO threshold level usage when just accelerometer (or
gyroscope) data are stored. The STOP_ON_FTH bit set to 0 in the CTRL4_C register. The
threshold level is set to 21 through the FTH[11:0] bits. The FTH bit of the FIFO_STATUS2
register rises after the level 21 has been reached (21 samples in the FIFO). Since, the
STOP_ON_FTH bit is set to 0, the FIFO will not stop at the 21^st sample, but will keep storing
data until the FIFO_FULL flag is set high.
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