AN4650 Datasheet, PDF (21/102 Pages) STMicroelectronics – This document is intended to provide usage information

AN4650
Operating modes
The digital signal is then filtered by a low-pass digital filter (LPF1) whose cutoff frequency
depends on the selected accelerometer ODR, as shown in Table 8.
Table 8. Accelerometer LPF1 cutoff frequency
Accelerometer
ODR [Hz]
LPF1 digital Filter
cutoff frequency [Hz]
13 Hz (Low Power)
742
26 Hz (Low Power)
742
52 Hz (Low Power)
742
104 Hz (Normal mode)
742
208 Hz (Normal mode)
742
13 Hz (High Performance)
23
26 Hz (High Performance)
46
52 Hz (High Performance)
92
104 Hz (High Performance)
184
208 Hz (High Performance)
369
416 Hz (High Performance)
742
833 Hz (High Performance)
1.66 kHz (High Performance)
1517
3320
3.33 kHz (High Performance)
1517
6.66 kHz (High Performance)
3320
Finally, the digital signal is processed by the composite group of filters composed of a low-
pass digital filter (LPF2), a high-pass digital filter and a slope filter. As shown in Figure 2, it is
possible to independently apply these filters to the accelerometer output data (and to the
FIFO data) and/or to the interrupt generators.
The enable signal of these high-pass and low-pass digital filters is the logic “OR” of the
SLOPE_FDS bit of the TAP_CFG register and the FUNC_EN bit of the CTRL10_C register.
The SLOPE_FDS bit is also used to select the filter (high-pass or slope) used for the wake-
up interrupt functionality. For this reason, if the wake-up functionality is implemented using
the slope filter and also the LPF2 filter is required, the latter has to be enabled by setting the
FUNC_EN bit to 1.
In all other cases, to enable the high-pass and low-pass digital filters it’s recommended to
set to 1 the SLOPE_FDS bit and set to 0 the FUNC_EN bit (if the embedded functions, such
as the Android functions and the sensor hub, are not used).
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