STM32F383XX Datasheet, PDF (91/125 Pages) STMicroelectronics – Reset and power management

STM32F383xx
Electrical characteristics
Figure 22. SPI timing diagram - slave mode and CPHA = 0
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tSU(NSS)
tc(SCK)
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
MOSI
I NPUT
tsu(SI)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
Figure 23. SPI timing diagram - slave mode and CPHA = 1⁽¹⁾
ai14134c
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCLH)
tw(SCLL)
MISO
OUT P UT
MOSI
I NPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MS B O UT
th(SI)
M SB IN
th(SO)
BI T6 OUT
B I T1 IN
1. Measurement points are done at 0.5V_DD level and with external C_L = 30 pF_.
th(NSS)
tr(SCL)
tf(SCL)
tdis(SO)
LSB OUT
LSB IN
ai14135
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