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STD90NH02L_06 Datasheet, PDF (9/16 Pages) STMicroelectronics – N-channel 24V - 0.0052ohm - 60A - DPAK/IPAK STripFET TM Power MOSFET | |||
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STD90NH02L- STD90NH02L-1
4
Appendix A
Figure 19. Buck converter: power losses estimation
Appendix A
The power losses associated with the FETs in a synchronous buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
â The low side (SW2) device requires:
â Very low RDS(on) to reduce conduction losses
â Small Qgls to reduce the gate charge losses
â Small Coss to reduce losses due to output capacitance
â Small Qrr to reduce losses on SW1 during its turn-on
â The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
â voltage to avoid the cross conduction phenomenon;
â The high side (SW1) device requires:
â Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on
the gate
â Small Qg to have a faster commutation and to reduce gate charge losses
â Low RDS(on) to reduce the conduction losses.
Table 6.
Power losses calculation
High side switching (SW1)
Low side switch (SW2)
Pconduction
R DS(on)SW1 * I2L *δ
R DS(on)SW2 * I2L * (1 â δ )
Pswitching
Vin
*
(Qgsth(SW1)
+
Qgd(SW1)
)*f
*
IL
Ig
Zero Voltage Switching
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