STM32F051R6T6 Datasheet, PDF (89/104 Pages) STMicroelectronics – Low- and medium-density advanced ARM-based 32-bit MCU

Electrical characteristics
Table 67. I²S characteristics
Symbol
Parameter
Conditions
f_CK
1/t_c(CK)
I²S clock frequency
t_r(CK)
t_f(CK)
t_w(CKH) ⁽¹⁾
t_w(CKL) ⁽¹⁾
t_v(WS) ⁽¹⁾
t_h(WS) ⁽¹⁾
t_su(WS) ⁽¹⁾
t_h(WS) ⁽¹⁾
DuCy(SCK)
t_{su(SD_MR)} ⁽¹⁾
t_{su(SD_SR)} ⁽¹⁾
t_{h(SD_MR)(1)(2)}
t_{h(SD_SR)} ⁽¹⁾⁽²⁾
I²S clock rise time
I²S clock fall time
I2S clock high time
I2S clock low time
WS valid time
WS hold time
WS setup time
WS hold time
I2S slave input clock duty
cycle
Data input setup time
Data input setup time
Data input hold time
t_{v(SD_ST)} ⁽¹⁾⁽²⁾ Data output valid time
Master mode (data: 16 bits, Audio
frequency = 48 kHz)
Slave mode
Capacitive load C_L = 15 pF
Master f_PCLK= 16 MHz, audio
frequency = 48 kHz
Master mode
Master mode
Slave mode
Slave mode
Slave mode
Master receiver
Slave receiver
Master receiver
Slave receiver
Slave transmitter (after enable
edge)
t_{h(SD_ST)} ⁽¹⁾
Data output hold time
Slave transmitter (after enable
edge)
t_{v(SD_MT)} ⁽¹⁾⁽²⁾ Data output valid time
Master transmitter (after enable
edge)
t_{h(SD_MT)} ⁽¹⁾ Data output hold time
Master transmitter (after enable
edge)
1. Data based on design simulation and/or characterization results, not tested in production.
2. Depends on f_PCLK. For example, if f_PCLK=8 MHz, then T_PCLK = 1/f_PLCLK =125 ns.
Min
1.597
0
-
-
306
312
2
2
7
0
25
6
2
4
0.5
-
13
-
0
STM32F051x
Max
1.601
6.5
10
12
-
-
-
-
-
-
75
-
-
-
-
20
-
Unit
MHz
ns
%
ns
4
-
90/105
Doc ID 022265 Rev 3