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STM32F401XB Datasheet, PDF (82/135 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 105 DMIPS, 256KB Flash/64KB RAM, 11 TIMs, 1 ADC, 11 comm. interfaces | |||
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STM32F401xB STM32F401xC
Electrical characteristics
6.3.11
PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences (see Table 49: EMI characteristics for WLCSP49). It is available only on the
main PLL.
Symbol
fMod
md
MODEPER * INCSTEP
1. Guaranteed by design.
Table 43. SSCG parameters constraint
Parameter
Min
Modulation frequency
-
Peak modulation depth
0.25
-
Typ Max(1) Unit
-
10
KHz
-
2
%
-
215-1
-
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
MODEPER = round[fPLL_IN â (4 Ã fMod)]
fPLL_IN and fMod must be expressed in Hz.
As an example:
If fPLL_IN = 1 MHz, and fMOD = 1 kHz, the modulation depth (MODEPER) is given by
equation 1:
MODEPER = round[106 â (4 Ã 103)] = 250
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
INCSTEP = round[((215 â 1) à md à PLLN) â (100 à 5 à MODEPER)]
fVCO_OUT must be expressed in MHz.
With a modulation depth (md) = ±2 % (4 % peak to peak), and PLLN = 240 (in MHz):
INCSTEP = round[((215 â 1) Ã 2 Ã 240) â (100 Ã 5 Ã 250)] = 126md(quantitazed)%
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
mdquantized% = (MODEPER Ã INCSTEP Ã 100 Ã 5) â ((215 â 1) Ã PLLN)
As a result:
mdquantized% = (250 Ã 126 Ã 100 Ã 5) â ((215 â 1) Ã 240) = 2.002%(peak)
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