STM6524 Datasheet, PDF (8/24 Pages) STMicroelectronics – Integrated test mode

Pin descriptions
2
Pin descriptions
STM6524
2.1
Power supply (V_CC)
This pin is used to provide power to the Smart Reset™ device. A 0.1 µF ceramic decoupling
capacitor is recommended to be connected between the V_CC and V_SS pins, as close to the
STM6524 device as possible.
2.2
Ground (V_SS)
Ground pin for the device.
2.3
Smart Reset™ input (SR0)
Push-button Smart Reset™ input is active low with optional pull-up resistor. Both SR
inputs need to be asserted simultaneously for at least t_SRC to assert the reset output (RST).
By connecting a voltage higher than V_CC to the SR0 the device enters a test mode (see
Section 1: Description on page 5 for more information).
2.4
Smart Reset™ input (SR1)
Push-button Smart Reset™ input is active low with optional pull-up resistor. Both SR inputs
need to be asserted simultaneously for at least t_SRC to assert the reset output (RST).
2.5
Reset output (RST)
RST is active low or active high, push-pull or open drain reset output with optional internal
pull-up resistor. Output reset pulse width is optional as follows:
● Neither fixed nor minimum output reset pulse duration (releasing the push-button while
reset output is active, causes the output to de-assert);
● Fixed, factory-programmed output reset pulse duration for t_REC independent on Smart
Reset™ input state.
If V_CC drops below 1.575 V, the RST output is deasserted and its state is guaranteed down
to 1 V (see Figure 8).
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Doc ID 022335 Rev 3