STM6524 Datasheet, PDF (7/24 Pages) STMicroelectronics – Integrated test mode

STM6524
Description
Table 1. Signal names
Pin Name
Type
Description
1 V_SS Supply ground Ground
2 SR1
Input
Secondary push-button Smart Reset™ input. Active low. Optional pull-up resistor.
3 RST
Output
Reset output
(open drain with optional pull-up resistor, active low)
(push-pull – active low or active high)
4 NC
5 SR0
-
Input
Not connected (not bonded; should be connected to V_SS)
Primary push-button Smart Reset™ input. Active low. Optional pull-up resistor.
Positive supply voltage for the device. A 0.1 µF decoupling ceramic capacitor is
6 V_CC Supply voltage recommended to be connected between V_CC and V_SS pins, as close to the STM6524
device as possible.
Figure 3. Block diagram
/VERVOLTAGEDETECT
 TESTMODETRIGGER
32 
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T32#
T2%#
GENERATOR
234
32
GENERATOR
OPTIONAL
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Doc ID 022335 Rev 3
7/24