ST10F269 Datasheet, PDF (79/160 Pages) STMicroelectronics – 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM

ST10F269
Port 5 pins have a special port structure (see Figure 35), first because it is an input only port, and second
because the analog input channels are directly connected to the pins rather than to the input latches.
Figure 35 : Block Diagram of a Port 5 Pin
to Sample + Hold
Circuit
Channel
Select
Analog
Switch
P5.y/ANy
Read Port P5.y Clock
Read
Buffer
Input
Latch
y = 15...0
12.8.2 - Port 5 Schmitt Trigger Analog Inputs
A Schmitt trigger protection can be activated on each pin of Port 5 by setting the dedicated bit of register
P5DIDIS.
P5DIDIS (FFA4h / D2h)
SFR
Reset Value: 0000h
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI P5DI
DIS.15 DIS.14 DIS.13 DIS.12 DIS.11 DIS.10 DIS.9 DIS.8 DIS.7 DIS.6 DIS.5 DIS.4 DIS.3 DIS.2 DIS.1 DIS.0
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
P5DIDIS.y
Port 5 Digital Disable Register Bit y
P5DIDIS.y = 0: Port line P5.y digital input is enabled (Schmitt trigger enabled)
P5DIDIS.y = 1: Port line P5.y digital input is disabled (Schmitt trigger disabled,
necessary for input leakage current reduction)
12.9 - Port 6
If this 8-bit port is used for general purpose I/O, the direction of each line can be configured via the
corresponding direction register DP6. Each port line can be switched into push/pull or open drain mode
via the open drain control register ODP6.
P6 (FFCCh / E6h)
15 14 13 12 11 10 9
-
-
-
-
-
-
-
SFR
Reset Value: --00h
8
7
6
5
4
3
2
1
0
- P6.7 P6.6 P6.5 P6.4 P6.3 P6.2 P6.1 P6.0
RW RW RW RW RW RW RW RW
P6.y
Port Data Register P6 Bit y
DP6 (FFCEH / E7H)
15 14 13 12 11 10 9
-
-
-
-
-
-
-
SFR
Reset Value: --00h
8
7
6
5
4
3
2
1
0
- DP6.7 DP6.6 DP6.5 DP6.4 DP6.3 DP6.2 DP6.1 DP6.0
RW RW RW RW RW RW RW RW
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