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| M58WR064T Datasheet, PDF (79/81 Pages) STMicroelectronics – 64 Mbit (4Mb x 16, Multiple Bank, Burst ) 1.8V Supply Flash Memory | |||
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M58WR064T, M58WR064B
Table 42. Command Interface States - Lock Table, Next State
Next CI State After Command Input
Current CI State
L ock/C R
Setup( 4)
OTP Setup
Block Lock
Block
Lock-Down
(4)
Confirm
Confir m
Set CR
Conf irm
EFP Exit,
Quad EFP
Exit (3)
Illegal
Command
(5)
P/E. C.
Operation
C ompl eted
Ready
Lock/CR
Setup
OTP Setup
Ready
N/A
Lock/CR Setup
Ready (Lock error)
Ready
Ready (Lock error)
N/A
OTP
Setup
Busy
OTP Busy
N/A
Ready
Setup
Program Busy
N/A
Progr am Busy
Program Busy
Ready
Suspend
Program Suspended
N/A
Setup
Ready (error)
N/A
Busy
Erase Busy
Ready
Erase
Lock/CR
Suspend
Setup in
Er ase
Erase Suspended
N/A
Suspend
Setup
Program in
Erase
Busy
Suspend
Suspend
Program in Erase Suspend Busy
Program in Erase Suspend Busy
Program in Erase Suspend Suspended
N/A
Erase
Suspended
N/A
Lock/CR Setup
in Erase Suspend
Erase Suspend (Lock error)
Erase Suspend
Erase Suspend (Lock
error)
N/A
Setup
Ready (error)
N/A
EFP
Busy
EFP Busy (2)
EFP Verify EFP Busy(2)
N/A
Verify
EFP Verify (2)
Ready EFP Verify(2) Ready
QuadE FP
Setup
Busy
Quad EFP Busy (2)
Quad EFP Busy (2)
Ready
Quad EFP
Busy(2)
N/A
Ready
Note: 1. CI = Command Interface, CR = Configuration Register, EFP = Enhanced Factory Program, Quad EFP = Quadruple Enhanced Fac-
tory Program, P/E. C. = Program/Erase Controller.
2. EFP and Quad EFP are allowed only when Status Register bit SR0 is set to â0â. EFP and Quad EFP are busy if Block Address is
first EFP Address. Any other commands are treated as data.
3. EFP and Quad EFP exit when Block Address is different from first Block Address and data is FFFFh .
4. If the P/E.C. is active, both cycles are ignored.
5. Illegal commands are those not defined in the command set.
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