STV82X8 Datasheet, PDF (77/157 Pages) STMicroelectronics – Digital Audio Decoder / Processor for BTSC Television/Video Recorders

STV82x8
I2S_IN_MASK
Address: 88h
Type: R/W
Bit 7
0
Bit 6
0
Bit 5
0
I2S Mask
Register List
Bit 4
Bit 3
Bit 2
WORD_MASK[4:0]
Bit 1
Bit 0
Bit Name
Reset
Function
Bits [7:5]
WORD_MASK[4:0]
000 Reserved
11111 Define the mask to apply to 32-bit input samples. Range: 0 to 31
Note: This register has to be set before the Start of the Software (0x85 : HOST_RUN = 1).
I2S_IN_STATUS
SRC I2S Input Behaviour
Address: 89h
Type: R/W
Bit 7
Bit 6
Bit 5
Bit 4
AUTO_SRC_S
YNC
ENABLE_IRQ
_SRC_FREQ_
CHANGE
ENABLE_IRQ
_SYNC_FOUN
D
ENABLE_IRQ
_SYNC_LOST
Bit 3
Bit 2
Bit 1
Bit 0
I2S_INPUT_FREQ
Bit Name
Reset
Function
AUTO_SRC_SYNC
0 Allow the DSP to reset the SRC input DMA when an input freq change is detected. (Working in
SRC mode only)
0: no reset on input frequency change
1: reset on input frequency change
ENABLE_IRQ_SRC 0 Generate an IRQ3 when a frequency change is detected on SRC input. (Working in SRC mode
_FREQ_CHANGE
only)
0: IRQ3 generation not active
1: IRQ3 generation active
ENABLE_IRQ_SYN 0 Generate an IRQ2 when a signal is synchronized on SRC input. (Working in SRC mode only)
C_FOUND
0: IRQ2 generation not active
1: IRQ2 generation active
ENABLE_IRQ_SYN 0 Generate an IRQ1 when a signal is lost on SRC input. (Working in SRC mode only)
C_LOST
0: IRQ1 generation not active
1: IRQ1 generation active
Bits [3]
0 Reserved
I2S_INPUT_FREQ
(000)
Display the frequency detected on SRC input
000: no signal locked on SRC input 100:
001: 32 kHz
101:
010: 44.1 kHz
110:
011: 48 kHz
111:
signal locked but frequency unknown
not used
not used
not used
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