STV82X8 Datasheet, PDF (45/157 Pages) STMicroelectronics – Digital Audio Decoder / Processor for BTSC Television/Video Recorders

STV82x8
11.2 Start-up and Configuration Change Procedure
Figure 30: Flowchart
I²C Interface
Power ON
Hardware Reset (by pin 43)
NOTE: This HW reset after Power ON is
mandatory to prevent incorrect device
configuration.
Clock PLLs progammation
(Registers FS1 and FS2)
(for oscillator values other than 27 MHz)
Load Patch File
(By I²C transfer)
HW_RESET bit = 1
(bit 2 in HOST_CMD register)
(DSP RUN)
INIT_MEM bit ?
(bit 0 in DSP_STATUS
register)
(DSP inititialization)
=0
=1
Device Configuration Set-up
(Analog or Digital)
HOST_RUN bit = 1
(bit 0 in DSP_RUN register)
(Start DSP processing)
INIT_MEM bit = 0
(Change configuration)
HOST_NO_INIT bit = 1
(bit 1 in DSP_RUN register)
(OPTIONAL)
(Registers 85h to FFh are not reset)
HOST_RUN bit = 0
(Stop DSP processing)
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