STM32F101XC Datasheet, PDF (74/106 Pages) STMicroelectronics – High-density access line, ARM-based 32-bit MCU with 256 to 512 KB Flash, 9 timers, 1 ADC and 10 communication interfaces

Electrical characteristics
STM32F101xC, STM32F101xD, STM32F101xE
Figure 38. NAND controller waveforms for common memory write access
FSMC_NCEx _Low
ALE (FSMC_A17)
CLE (FSMC_A16)
t_d(ALE-NOE)
FSMC_NWE
t_w(NWE)
t_h(NOE-ALE)
FSMC_NOE
FSMC_D[15:0]
t_d(D-NWE)
t_v(NWE-D)
t_h(NWE-D)
ai14913b
Table 40. Switching characteristics for NAND Flash read and write cycles⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_d(D-NWE)(2)
t_w(NOE)(2)
FSMC_D[15:0] valid before FSMC_NWE high
FSMC_NOE low width
6T_HCLK + 12
ns
4T_HCLK – 1.5 4T_HCLK + 1.5 ns
t_su(D-NOE)(2)
FSMC_D[15:0] valid data before FSMC_NOE
high
25
ns
t_h(NOE-D)(2) FSMC_D[15:0] valid data after FSMC_NOE high 7
ns
t_w(NWE)(2)
FSMC_NWE low width
4T_HCLK – 1 4T_HCLK + 2.5 ns
t_v(NWE-D)(2) FSMC_NWE low to FSMC_D[15:0] valid
0
ns
t_h(NWE-D)(2) FSMC_NWE high to FSMC_D[15:0] invalid
10T_HCLK + 4
ns
t_{d(ALE-NWE)(3)} FSMC_ALE valid before FSMC_NWE low
3T_HCLK + 1.5 ns
t_{h(NWE-ALE)(3)} FSMC_NWE high to FSMC_ALE invalid
3T_HCLK + 4.5
ns
t_{d(ALE-NOE)(3)} FSMC_ALE valid before FSMC_NOE low
3T_HCLK + 2 ns
t_{h(NOE-ALE)(3)} FSMC_NWE high to FSMC_ALE invalid
3T_HCLK + 4.5
ns
1. C_L = 15 pF.
2. Based on characterization, not tested in production.
3. Guaranteed by design, not tested in production.
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Doc ID 14610 Rev 7