STM32F205XX Datasheet, PDF (70/170 Pages) STMicroelectronics – USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Electrical characteristics
STM32F205xx, STM32F207xx
Table 18.
Symbol
Typical and maximum current consumption in Run mode, code with data processing
running from Flash memory (ART accelerator enabled) or RAM ⁽¹⁾
Typ
Max⁽²⁾
Parameter
Conditions
f_HCLK
T_A =
25 °C
T_A =
T_A = ^Unit
85 °C 105 °C
120 MHz
90 MHz
49
63
72
38
51
61
External clock⁽³⁾, all
peripherals enabled⁽⁴⁾
60 MHz
26
39
49
30 MHz
14
27
37
25 MHz
11
24
34
16 MHz⁽⁵⁾
8
21
30
I_DD
Supply current in
Run mode
8 MHz
4 MHz
2 MHz
120 MHz
5
17
27
3
16
26
2
15
25
mA
21
34
44
External clock⁽³⁾, all
peripherals disabled
90 MHz
60 MHz
30 MHz
25 MHz
16 MHz⁽⁵⁾
8 MHz
4 MHz
17
30
40
12
25
35
7
20
30
5
18
28
4.0
17.0 27.0
2.5
15.5 25.5
2.0
14.7 24.8
2 MHz
1.6
14.5 24.6
1. Code and data processing running from SRAM1 using boot pins.
2. Based on characterization, tested in production at V_DD max and f_HCLK max with peripherals enabled.
3. External clock is 4 MHz and PLL is on when f_HCLK > 25 MHz.
4. When the ADC is on (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for
the analog part.
5. In this case HCLK = system clock/2.
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Doc ID 15818 Rev 8