TDA8204B Datasheet, PDF (7/12 Pages) STMicroelectronics – NICAM DECODER

TDA8204B
5.3 - SOFTWARE SPECIFICATION
Software control of IC’s is given by programming
four registers, one read only status register (SR0)
and three read and write control registers (CR1,
CR2, CR3).
Transmit format : S = Start, A = Acknowledge
P = stop
S
CHIP
ADDRESS
0A
REG SUB
ADDRESS
A DATA A
P
Receive format :
S
CHIP
ADDRESS
1A
SR0
DATA
A
CR1
DATA
A
P
Note : All registers are read sequentially; device status and the
contents of all registers may be read. The sequence may be
terminated by not acknowledging (NOACK) the slave.
Chip address
1
0 1 1 0 1 HAO R/W
MSB
LSB
HAO : Hardware address selection pin
Register addresses
Reg.
Name
Sub Adress
Function
SR0 0 0 0 0 0 0 0 0 NICAM status
CR1 0 0 0 0 0 0 0 1 Matrix and mutes
CR2 0 0 0 0 0 0 1 0 NICAM control
CR3 0 0 0 0 0 0 1 1 Switches
Register contents
SR0 : NICAM status (read only)
US2 C1 C2 C3 C4 MUT LA2 L/S
US2 0
0
0
1
1
1
1
MSB
LSB
L/S : • If FN1 bit of CR2 is 0, LS bit is loss of
frame alignment status
LS =1, FAW is lost
LS = 0 FAW is identified
• If FN1 bit of CR2 is 1, LS bit is selected
system status
LS = 1, B/G standard
LS = 0, I standard
LA2 : Loss of sub-frame alignment
(1 = loss of alignment)
MUT : NICAM mute (1 = DAC outputs muted)
C4 : Reserve sound flag (1 = FM backup)
C3 : Application control bit 3
C2 : Application control bit 2
C1 : Application control bit 1
US2 : User bit 2 (input)
US2 bit indicates the state of US2 input Pin
CR1 : Matrix and mutes (read and write register)
Q1 Q0 I2 I1 I0 G0 AUM FRE
0
0
0
0
0
0
0
0
MSB
LSB
Qn : Output select (see tables)
In : Input select (see tables)
G0 : Auxiliary output gain, 0 = 0dB, 1 = 6dB
AUM : Auxiliary output mute, 0 = no-mute,
1 = muted
FRE : Free run clock VCXO for set up,
0 = normal, 1 = free run
To set crystal series capacitor
Switches and Matrix Description
Figure 6
34
LFIL1
36 35
32 31
38 37
27 AOL
28 AOR
RFIL1
INTL
INTR
Reserve sound switch
Audio matrix
Output selection
Q1
Q0
0
0
0
1
Output
AOL
AOR
Mute and gain selection
Q0
I2
Mute
0
0
OFF*
0
1
ON*
1
0
-
1
1
-
* Mute is activated by left channel selection
** Gain is activated by right channel selection
Gain
-
-
0dB**
+6dB**
Input selection
I1
I0
0
0
0
1
1
0
1
1
Input
INTL
INTR
EAIL
EAIR
Example of programming
First : 0 0 1 0 0 X X X
step
INTL connected to AOL, mute ON on
AOL/AOR
Sec- : 0 1 0 1 1 X X X
ond
EAIR connected to AOR, gain 0dB on
step
AOL/AOR
Thrird : 0 0 0 0 0 X X X
step
INTL connected to AOL, mute OFF on
AOL/AOR
The power up default configuration is 0dB and
unmute for both channels AOL/R, and INTL con-
nected to AOL, and INTR connected to AOR.
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