L6256 Datasheet, PDF (7/28 Pages) STMicroelectronics – 12V COMBO

SATURATED SEEK BIT
The processor can command the VCM amplifiers
to hard saturate, in the polarity determined by the
sign bit of the DAC. The saturation detector bit is
not the echo of this bit, but is a separate compa-
rator bit representing the true state of the ampli-
fier. Thus, it can be used for loopback testing of
the DOLPHIN.
VCM CURRENT SENSE AMPLIFIER
The input differential voltage of the amplifier can
be limited to low voltage, but common mode re-
jection is very high. The amplifier is capable of
operating smoothly when the VCM amplifiers are
saturated, providing no input charge buildup or
other anomalies. Charge does not build up on
the inputs even when VCM inductance forces the
inputs substantially above the supply or below
ground.
SATURATION DETECTOR
This detector notifies the processor when the
commanded VCM current does not match the ac-
tual VCM current. The threshold is set by
VC_Sat.
Fault Detection
UV DETECTION
The power supply undervoltage protection is set
up for the appropriate tolerances, and causes a
low signal on POR\. A small hysteresis is in-
cluded on the voltage comparators, and band-
width limiting techniques are used. Current limit
from the 3.3V regulator has been added to the
POR error inputs.
POWER ON RESET (see appendix B)
The power on reset circuit provides the following
functions:
● A retriggerable one shot of several millisec-
onds.
L6256
● An interlock circuit which provides for dis-
charge of the one shot, and a clamp to hold
the POR\ line low during the timing interval.
● Circuitry to pull POR\ high quickly after the 1
shot has timed out.
● A current source or weak pullup to pull the
POR\ line high against external leakage cur-
rents.
Undervoltage conditions override external inputs
and force POR\ low. External inputs do not cause
pulse stretching; all internal inputs do.
PCBA in-circuit testing can arbitrarily pull this line
low as necessary to restart the system. Alter-
nately, a 1 milliamp current can be introduced to
the timing capacitor to speed up the POR timeout.
THERMAL LIMIT
The thermal limit of the chip is set for THlimit with
THhyst degrees of hysteresis. Thermal limit is a
relative voltage, above Thwarn for tolerance rea-
sons, and must protect the part; it indicates that
thermal limit is taking place by disabling the serial
port (see serial port section). A park and a spin-
dle driver tristate is performed when thermal limit
occurs.
THERMAL WARNING
Thermal warning is made available to the proces-
sor as a status bit in every register, to allow a
modified control algorithm strategy that reduces
power dissipation and drops chip temperature.
PARK CIRCUIT
The park circuit provides smooth head retraction.
In Park, the VCM is switched to voltage mode.
Bout is grounded. The A amplifier’s positive in-
put is switched from the normal half supply refer-
ence down to Vpark, and Aout applies the volt-
age determined by Vpark and Rp1 and Rp2. This
damps any motion that may been in progress and
causes the head to retract into the latch.
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