L6256 Datasheet, PDF (22/28 Pages) STMicroelectronics – 12V COMBO

L6256
Back Emf Detection
Back EMF detection has 2 different modes of operation: Start mode (detemined by the manufacturer),
and Run Phased mode. These are determined by the state of the Start bit.
BACK EMF RUN MODE SPECIFICATIONS
Parameter
Rshold Output Impedance
Chop Blank Pulse width tchb
On Delay width
Test Conditions
25°C
(1)
(2)
BEMF start mode detect offset - Vebias
BEMF detect hysteresis
Min.
23.5
20
Typ.
150
25
22
Max.
250
27.5
24
±40mV
10mV nominal
Units
Ω
µs
% of ramp
rise time
(1) At 6000 rpm, 8 pole motor, sinusoidal EMF from center tap to the A phase of 8 volts p-p, Rref = 62.5K 1%, Rref2 = 120K 1%.
(2) on delay width is from the end of off time to the end of On_Del. Measured at max duty cycle (no off time due to feedforward compensa-
tion). Specification allows for toff min, to set nominally 20% width of total cycle time.
START MODE
During startup, all 3 back EMF phases are used.
The output going to the BEMF_Det line is the ex-
clusive or of all 3 phases, and follows the polarity
of whichever phase is currently tristated (relative
to the center tap voltage). If the processor is driv-
ing the motor directly from the CPR, the back
EMF circuitry is still active. Tripolar mode by na-
ture prevents EMF detection. EMF transitions are
partially blanked by the controller chip in all
modes.
Figure 13. Back EMF Chop Blanking Mode
Waveforms
Run Phased Mode
The Run Phased Mode is now the default (and
only) state in the DOLPHIN during run mode.
The chop waveform is injected into the back emf
waveform of the unused winding due to trans-
former coupling and the action of the center tap.
Most of the transient is removed by using a high
CMRR amplifier before the signal gets to the
sample/hold circuit, and by holding during the off
time of the chop. However, a small residual is left
on the sample/hold waveform. This small tran-
sient must be kept away from the back EMF
crossing point or it will cause an unstable loop.
This can only be done if the PWM on edge is at
the proper timing relative to the back EMF point.
A comparator is provided internally that generates
the proper delay point by comparing the back
EMF waveform against a small offset voltage
(settable externally). The programmer must then
vary the commutation timing until the PH_DET bit
goes high, indicating that the chop and EMF
crossing waveforms are properly phased. This
timing is produced by modifying the phase delay
in the controller chip until PH_DET is high.
Note that the PH_DET bit is updated at the rising
edge of the chop blanking comparator. If the
On_Del signal (the blanking signal that frames the
EMF on transient) is high during the edge, then
the transient is in the proper position.
The timing of the proper position is set by several
external variables; the PWM frequency, the run-
ning RPM speed, and the external reference volt-
age.
The relationships of the chop blanking compara-
tor, the On_Del signal, and the Ph_Det bit in the
serial port are illustrated in fig. 13.
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