ESDAXLC4-1BF3 Datasheet, PDF (7/10 Pages) STMicroelectronics – Single line extra low capacitance TVS

ESDAXLC4-1BF3
PCB recommendations
To optimize the natural self centering effect of CSP on the PCB, PCB pad positioning and
size have to be properly designed (see Figure 13)
Micro vias
An alternative to routing on the top surface is to route out on buried layers. To achieve this,
the pads are connected to the lower layers using micro vias. Only SSBU via technology is
approved.
Figure 13. Solder mask opening
450 µm
370 µm
370 µm
255 µm 180 µm
180 µm
100 µm
Non solder mask defined
Solder mask defined
Doc ID 018522 Rev 2
7/10