AN1126 Datasheet, PDF (7/16 Pages) STMicroelectronics – CURRENT SHARING OF THE L4973

Figure 10. Power saved vs. Iout.
2
Psaved
[W]
1.5
Psave( Iout , 5.1 , 12, 0.05 )
Vcc=12V
Vo=5.1V
fsw=200kHz
Psave( Iout , 5.1 , 12, 0.085 ) 1
Psave( Iout , 5.1 , 12, 0.1 )
0.5
AN1126 APPLICATION NOTE
ESR=100mΩ
85mΩ
50mΩ
0
0 1 2 3 4 5 6 7 8 9 10
Iout [ A ]
The gained power as a percentage of the output power using the multiphase PWMs instead of synchro-
nized PWMs is :
∆P%(δ)
=
Psaved (δ)
Po
⋅
100
∆P%(δ)
=
ESR
2
⋅
Iout
Vcc
⋅
100
So the percentage gained power, ∆P%, for a fixed Iout, Vcc and ESR does not change with the output
voltage.
For example if the input capacitor has an ESR of 100mOhm for a 12V/3.3V or 12V/5V power conversion,
with Iout = 7A, there is in both cases a ∆P% gain of 3% .
Table1 shows in details the major tips for different output voltages.
Table 1. Vcc = 12V , Iout = 7A, ESR=100mΩ.
Vo
Irmssync Irmsmulti
∆Irms
Psync
(V)
(A)
(A)
(A)
(W)
3.3
3.13
1.74
1.39
0.98
5.1
3.46
1.25
2.21
1.2
6
3.5
0
3.5
1.23
The gained power ∆P% versus duty cycle is shown in figure 10.
Pmulti
(W)
0.3
0.16
0
Psaved
(W)
0.68
1.04
1.23
∆P%
Gained
3%
3%
3%
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