AN1126 Datasheet, PDF (5/16 Pages) STMicroelectronics – CURRENT SHARING OF THE L4973

AN1126 APPLICATION NOTE
Iout is the total output current equal to the sum of the individual output currents delivered from the two
sections.
Figure 6. Input current of the two sections for different duty cycle.
1
PWM1
PWM2
0
0
t
δ<0.5
1
PWM1
PWM2
0
0
t
δ=0.5
1
PWM1
PWM2
0
0
t
δ>0.5
If the PWM signals are synchronized without any delay, the RMS current through the input filter as a
function of duty cycle is :
Irmssync (δ) = √(Iout⋅√δ)²ï£¥âˆ’(Iout⋅δ)²
synchronized (2)
Figure 7. RMS current through the input capacitor with synchronization and with multiphase.
[ A ] Iout
3Iout/4
Irms ( δ )
Irmssync ( δ )
Iout/2
Iout/4
Irms
Irmssync
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
δ
Figure 7 shows Equations (1) and (2) versus the duty cycle.
The maximum RMS current with synchronized PWMs is 1/2 of the total output current and it is obtained
for δ = 0.5.
In contrast, considering the multiphase PWM, the RMS value is 0 with δ = 0.5 and the max value of the
RMS value is 1/4 of the total output current. So the maximum RMS current with multiphased PWMs
is a half of that syncronized PWMs.
For every duty cycle condition the RMS current with multiphase application is lower than the case with
synchronized PWMs and it is quite regular for different duty cycles.
It allows to optimize the input capacitor for the real working condition. In the synchronized case the input
capacitor has to be dimensioned for the worst case of δ = 0.5 that can be far from the real working con-
ditions.
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