74LCX74_06 Datasheet, PDF (7/17 Pages) STMicroelectronics – Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs

74LCX74
Electrical characteristics
Table 7. AC electrical characteristics
Test condition
Symbol
Parameter
V_CC
C_L
R_L
(V)
(pF)
(Ω)
Propagation delay 2.7
t_PLH t_PHL time (CK to Q or
Q)
3.0 to 3.6
50
500
Propagation delay 2.7
t_PLH t_PHL time (PR or CLR
to Q or Q)
3.0 to 3.6
50
500
Setup time, HIGH
2.7
t_S
or LOW level D to
50
500
CK
3.0 to 3.6
Hold time, HIGH
2.7
t_h
or LOW level D to
CK
3.0 to 3.6
50
500
CK Pulse width,
2.7
t_W
HIGH or LOW
PR or CLR Pulse _{3.0 to 3.6}
50
500
Width, LOW
t_rec
Recovery time PR
2.7
or CLR to CK
3.0 to 3.6
50
500
t_s = t_r
(ns)
2.5
2.5
2.5
2.5
2.5
2.5
Value
-40 to 85 °C Unit
Min Max
1.5 8.0
ns
1.5 7.0
1.5 8.0
ns
1.5 7.0
2.5
ns
2.5
1.5
ns
1.5
3.0
ns
3.0
0
ns
0
f_MAX
Clock pulse
frequency
2.7
50
500
2.5
150
MHz
t_OSLH
t_OSHL
Output to output
skew time ^{(1) (2)}
3.0 to 3.6
50
500
2.5
1.0 ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (t_OSLH = | t_PLHm - t_PLHn|,
t_OSHL = | t_PHLm - t_PHLn|)
2. Parameter guaranteed by design
Table 8. Capacitive characteristics
Test condition
Symbol
Parameter
V_CC
(V)
C_IN Input capacitance
Power dissipation
C_{PD capacitance (1)}
3.3
V_IN = 0 to V_CC
3.3
f_IN = 10MHz
V_IN = 0 or V_CC
Value
T_A = 25 °C
Unit
Min Typ Max
6
pF
40
pF
1. C_PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. I_CC(opr) = C_PD x V_CC x f_IN + I_CC/2 (per gate)
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