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TDA7580 Datasheet, PDF (6/31 Pages) STMicroelectronics – FM/AM DIGITAL IF SAMPLING PROCESSOR
TDA7580
PIN DESCRIPTION (continued)
N°
Name
17 PROTSEL_SS
18 SDA_MOSI
19 MISO
20 SCL_SCK
21 GND
22 VDD
23 IQSYNC
24 IQCH1
25 IQCH2
26 IQCH3
27 VDDH
28 GNDH
29 RDS_INT
Type
Description
Notes
B DSP0 GPIO for Control Serial Interface DSP0 GPIO0
(Low: SPI or High: I2C) selection at
device Bootstrap.
In SPI protocol mode, after Boot
5V tolerant
With internal pull_up, on
at reset
procedure, SPI Slave Select, otherwise
DSP0 GPIO0
B Control Serial Interface and RDS IO:
5V tolerant
- SPI mode: slave data in or master data With internal pull_up, on
out for main SPI and RDS SPI data in at reset
- I2C mode: data for main I2C or RDS I2C
B SPI slave data out or master data in for DSP0 GPIO1
main SPI and RDS SPI data out
5V tolerant
With internal pull_up, on
at reset
B Bit clock for Control Serial Interface and 5V tolerant
RDS
With internal pull_up, on
at reset
G Digital Core Power Ground
P Digital Core Power Supply
1.8V
B High Speed Synchronous Serial
DSP1 GPIO0
Interface (HS3I) clock if HS3I master
5V tolerant
mode, else DSP1 GPIO or DSP1 Debug With internal pull_up, on
Port Clock (DBOUT1)
at reset
B High Speed Synchronous Serial
DSP1 GPIO1
Interface (HS3I) Channel 1 Data if HS3I 5V tolerant
master mode, else DSP1 GPIO or DSP1 With internal pull_up, on
Debug Port Request (DBRQ1)
at reset
B High Speed Synchronous Serial
DSP1 GPIO2
Interface (HS3I) Channel 2 Data if HS3I 5V tolerant
master mode, else DSP1 GPIO or DSP1 With internal pull_down,
Debug Port Data In (DBIN1)
on at reset
B High Speed Synchronous Serial
DSP1 GPIO3
Interface (HS3I) Channel 3 Data if HS3I 5V tolerant
master mode, else DSP1 GPIO or DSP1 With internal pull_down,
Debug Port Data Out (DBCK1)
on at reset
P 3.3V IO Ring Power Supply (HS3I, I2C/
SPI, RDS, INT)
G 3.3V IO Ring Power Ground (HS3I, I2C/
SPI, RDS, INT)
B RDS interrupt to external main
microprocessor in case of traffic
information
DSP1 GPIO4
5V tolerant
With internal pull_up, on
at reset
After
Reset
Input
Input
Input
Input
Input
Input
Input
Input
Input
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