HDMIULC6-4SC6Y Datasheet, PDF (6/12 Pages) STMicroelectronics – Automotive ultralarge bandwidth ESD protection

Technical information
3
Technical information
HDMIULC6-4SC6Y
3.1
Note:
Surge protection
The HDMIULC6-4SC6Y is particularly optimized to perform ESD surge protection based on
the rail to rail topology.
The clamping voltage V_CL can be calculated as follows
– V_CL+ = V_Transil + V_F, for positive surges
– V_CL- = - V_F, for negative surges
with: V_F = V_T + R_d.I_p
(V_F forward drop voltage) / (V_T forward drop threshold voltage)
and V_Transil = V_BR + R_{d_Transil} · I_P
Calculation example
We assume that the value of the dynamic resistance of the clamping diode is typically:
R_d = 0.5  and V_T = 1.1 V.
We assume that the value of the dynamic resistance of the Transil diode is typically
R_{d_Transil} = 0.5  and V_BR = 6.1 V
For an IEC 61000-4-2 surge Level 4 (Contact Discharge: V_g = 8 kV, R_g = 330 ),
V_BUS = +5 V, and, in first approximation, we assume that: I_p = V_g / R_g = 24 A.
We find:
– V_CL+ = +31.2 V
– V_CL- = -13.1 V
The calculations do not take into account phenomena due to parasitic inductances.
3.2
Surge protection application example
If we consider that the connections from the pin V_BUS to V_CC, from I/O to data line, and from
GND to PCB GND plane are two tracks 10 mm long and 0.5 mm wide, we can assume that
the parasitic inductances, L_VBUS, L_I/O, and L_GND, of these tracks are about 6 nH. So when an
IEC 61000-4-2 surge occurs on the data line, due to the rise time of this spike (tr = 1 ns), the
voltage V_CL has an extra value equal to L_I/O.dI/dt + L_GND.dI/dt.
The dI/dt is calculated as: dI/dt = I_p/t_r = 24 A/ns for an IEC 61000-4-2 surge level 4 (contact
discharge V_g = 8 kV, R_g = 330 
The over voltage due to the parasitic inductances is:
L_I/O.dI/dt = L_GND.dI/dt = 6 x 24 = 144 V
By taking into account the effect of these parasitic inductances due to unsuitable layout, the
clamping voltage will be:
– V_CL+ = +31.2 + 144 +144 = 319.2 V
– V_CL- = -13.1 - 144 -144 = -301.1 V
We can reduce as much as possible these phenomena with simple layout optimization.
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Doc ID 018879 Rev 2