CD00257532 Datasheet, PDF (6/19 Pages) STMicroelectronics – Application information

Block diagram and pin description
L4949ED-E, L4949EP-E
Table 2. Pin definitions and functions
Pin N°
SO-8
SO-20
Symbol
Function
1
19
2
20
3
1
4
2
5
4, 5, 6, 7, 14,
15, 16, 17
V_S
S_I
V_Z
C_T
GND
Input supply voltage. Block to GND via an external
capacitor (see Figure 3).
Sense input pin to supervise input voltage. Connect via an
external voltage divider connected to V_S and to GND.
Preregulator output voltage. For details, see Section 3.4:
Preregulator.
Reset pulse delay adjustment. Connecting this pin via a
capacitor to GND
Ground reference
6
10
7
11
8
12
RES
S_O
V_OUT
Reset output. It is pulled down when the output voltage
goes below V_RT.
Sense output. This open collector pin must be connected to
V_OUT via an external resistor. It is pulled down whenever
the S_I voltage becomes lower than an internal voltage.
Output voltage. Block to GND via an external capacitor (see
Figure 3)
- 3, 8, 9, 13, 18
NC
Not connected pins
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Doc ID 16823 Rev 1